Semiconductor Memory Testing via Data Rewrite
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing capacity and operational speed of semiconductor memory devices lead to higher costs and times in testing, as parallel testing methods often fail to detect defects in data pads not coupled to the tester, resulting in incomplete testing.
Innovation Solution
A method where first data is written into a memory cell array of a semiconductor memory device using test pads, with second data being rewritten from the memory cell array to the data pads, allowing for test result data to be output through test pads, enabling the testing of internal data paths across all data pads using a subset of test pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If parallel testing is used to increase testing speed, then productivity is improved, but measurement precision deteriorates because defects in data pads not coupled to the tester cannot be detected
Solution Approach 1:
The patent uses data from data pads that are not coupled to the tester (second data) and rewrites it into the memory cell array. This creates a copy of the data path that can be tested through the coupled data pads, allowing indirect testing of all data pads including those not physically connected to the tester.
Solution Approach 2:
The patent introduces an intermediary process where data is read from uncoupled data pads, rewritten into the memory array, and then read back through coupled data pads. This intermediary rewrite operation enables testing of all data paths using only a subset of physically connected test points.
2Measurement precision
If all data pads are coupled to the tester for complete defect detection, then measurement precision is improved, but device complexity increases due to additional components like latches
Solution Approach 1:
The patent makes the memory cell array serve a dual purpose: it functions as both the storage device being tested and as the testing mechanism itself. By rewriting data from uncoupled pads into the array and reading it back through coupled pads, the memory array performs the testing function without requiring external latches or additional test components.
Solution Approach 2:
The patent enables the memory cell array to perform multiple functions: normal data storage and testing of all data pads. The same memory array that stores operational data is also used as the test medium, eliminating the need for separate testing infrastructure.
3Ease of manufacture
If traditional testing methods are used with limited probe pins, then ease of manufacture is improved, but reliability deteriorates because not all data pads can be tested
Solution Approach 1:
The patent adds a temporal dimension to the testing process by using a sequence of operations (read, rewrite, read again) rather than requiring simultaneous physical connection to all data pads. This transforms a spatial limitation (number of probe pins) into a time-based solution where data circulates through the memory array.
Data Source
AI summary
A method of testing a semiconductor memory device includes writing first data to a memory cell array in the semiconductor memory device, loading second data from the memory cell array onto a plurality of data pads of the semiconductor memory device, rewriting the second data to the memory cell array, and outputting test result data through one or more test pads. The first data is received from an external device through the one or more test pads, which correspond to one or more of the plurality of data pads. The test result data is based on the rewritten data in the memory cell array.