Memory Testing via Address Jumping for Transient Error Detection
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Solution Overview
Problem
Memory testing methods are inefficient in detecting and addressing errors in memory areas, particularly in identifying correctable and uncorrectable errors, which can lead to unreliable memory performance and potential failures.
Innovation Solution
A method and apparatus for testing memory areas by performing a jump from a destination address back to a source address, examining the data word read, and using static and dynamic tests to determine error states, with error detection and correction codes to identify correctable and uncorrectable errors, and storing results in a map to assess memory quality and predict reliability degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional memory testing methods are used, then testing can be performed, but testing efficiency is low and error detection reliability is insufficient
Solution Approach 1:
The memory testing method is segmented into distinct phases: static testing phase and dynamic testing phase. The static phase identifies erased words and determines initial error states, while the dynamic phase performs address jumps and re-examines data words. This segmentation allows comprehensive error detection while maintaining testing efficiency by focusing dynamic tests only on relevant memory locations.
Solution Approach 2:
A static test is performed before the dynamic test to preliminarily identify erased words and determine their initial error states. This preliminary action allows the dynamic test to focus only on non-erased words and perform address jumps efficiently, improving overall testing efficiency while maintaining reliability through the two-phase approach.
2Reliability
If comprehensive error detection is performed, then reliability improves, but testing complexity increases
Solution Approach 1:
The testing method applies different test qualities to different memory locations based on their error states. Erased words are identified and handled differently from non-erased words. The dynamic test with address jumps is applied specifically to detect transient errors in non-erased words, while erased words are managed through separate logic. This local differentiation improves error detection capability without unnecessarily complicating the overall testing procedure.
Solution Approach 2:
The testing method changes the operational parameters of memory testing by introducing address jumps between source and destination addresses during the dynamic phase. This parameter change enables detection of transient errors that static testing cannot detect, improving reliability. The error state determination mechanism tracks changes in data word correctness before and after jumps, providing comprehensive error detection while managing complexity through systematic parameter variation.
3Reliability
If dynamic testing with address jumps is performed, then transient error detection improves, but testing time increases
Solution Approach 1:
The dynamic test performs address jumps and re-examinations, which is more action than a simple static read. This excessive action enables detection of transient errors that would otherwise be missed. However, the method optimizes this by using the error state map to track changes efficiently and by focusing jumps on relevant memory locations, balancing the additional testing action with improved transient error detection capability.
Solution Approach 2:
The method implements feedback through the error state map that records the correctness of data words before and after address jumps. This feedback mechanism allows the system to identify transient errors by comparing states, improving transient error detection. The feedback loop efficiently processes test results and updates the error state map, managing testing duration by providing clear pass/fail criteria based on error state changes.
Data Source
AI summary
A method for testing a memory area. The method includes jumping from a destination address to a source address, reading a data word at the source address after jumping to the source address, and examining the data word. The source address was determined based on a static test.