Memory Device Testing System With Transport And Data Processing

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Solution Overview

Problem

As memory devices become smaller and have higher circuit density, testing these devices efficiently to identify defects and improve product reliability and yield becomes increasingly challenging.

Innovation Solution

A system comprising test devices, a transport device, and a data processing device, where the transport device moves memory devices between test devices, determines if they are defective, and the data processing device generates reports based on test results and fabrication data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If memory devices are designed smaller with higher circuit density, then speed and functionality are improved, but errors and fabrication issues increase

Engineering Contradiction:
Improvememory device speedVSAvoidmemory device reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The system performs multiple different tests on memory devices at various stages of fabrication and packaging. By conducting tests in advance (wafer acceptance test) and at intermediate stages (chip probing test, final test), the system identifies defects early before they propagate through the manufacturing process, thereby maintaining reliability despite increased density.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The transport device communicates test results between different testing stages and provides feedback to the data processing device. This feedback loop enables continuous monitoring and analysis of test data, allowing the system to identify patterns and improve fabrication processes to maintain reliability as density increases.

Inventive Principle:
Principle #23Feedback

2Reliability

If multiple tests are performed on memory devices to improve reliability, then defect identification improves, but testing time and complexity increase

Engineering Contradiction:
Improveproduct reliabilityVSAvoidtesting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The testing process is divided into multiple segments or stages: wafer acceptance test, chip probing test, and final test. Each stage performs specific tests appropriate to that point in the manufacturing process. This segmentation allows comprehensive testing without requiring all tests to be performed sequentially on each device, reducing total testing time while maintaining reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Tests are performed at preliminary stages of manufacturing (wafer level, chip level) before final packaging. By conducting tests earlier in the process, the system identifies defective devices before they complete the entire manufacturing cycle, reducing the time and resources wasted on testing and handling defective devices through the entire process.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If comprehensive testing is performed to identify defects, then measurement precision improves, but device complexity increases

Engineering Contradiction:
Improvedefect detection precisionVSAvoidtesting system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The testing system is segmented into multiple independent test devices, each performing specific tests. The transport device coordinates these segmented testing operations and manages the flow of devices between test stations. This segmentation allows each test device to be specialized and relatively simple, while the overall system achieves comprehensive testing capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The transport device acts as an intermediary that coordinates between multiple test devices and the data processing device. It manages the complex logistics of moving devices between tests, tracking test results, and communicating with the data processing system. This intermediary role centralizes the complexity management, allowing individual test devices to remain relatively simple while achieving comprehensive testing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250140335A1System and method for testing memory
Publication Date: 2025.05.01 NAN YA TECH
  • US20250140335A1 patent drawing
  • US20250140335A1 patent drawing
  • US20250140335A1 patent drawing

AI summary

A system is provided. The system comprises test devices, a transport device and a data processing device. The test devices perform tests different from each other to a memory device and output test results of the tests. The transport device transports the memory device to the test devices and comprises a first storage device. The first storage device stores the test results and a list of a part of test devices that have tested the memory device. The data processing device stores fabrication data of the memory device. When the transport device determines that the memory device is defective according to at least one of the test results, the data processing device generates a report according the at least one of the test results and the fabrication data.