Memory Read Threshold Tracking for Adaptive BER Estimation
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Solution Overview
Problem
Existing bit error rate (BER) estimation and valley search (VS) methods in data storage devices fail to adapt to variations in memory cell characteristics, leading to suboptimal read threshold voltage settings and inefficient error correction, which can result in increased effort and resource consumption.
Innovation Solution
Implementing a hybrid variation of bit error rate estimation scan (BES) and on-chip threshold voltage (Vth) tracking that updates parameters based on BER results from failing pages to optimize read thresholds dynamically, reducing BER and improving memory reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional BER estimation scan and valley search methods are used to optimize read threshold voltage, then read threshold can be determined for specific wordlines, but the method fails to adapt to variations in memory cell characteristics leading to suboptimal read threshold settings
Solution Approach 1:
The patent implements dynamic read threshold voltage adjustment by introducing a read threshold tracker that continuously monitors and adapts to memory cell characteristic variations. The system dynamically updates read threshold voltages based on detected changes in memory cell behavior, transitioning from static pre-determined thresholds to adaptive thresholds that evolve with memory cell conditions.
Solution Approach 2:
The patent employs feedback mechanisms where read operations monitor memory cell responses and feed this information back to adjust read threshold voltages. The read threshold tracker uses feedback from actual read operations to detect drift in memory cell characteristics and subsequently adjusts thresholds to maintain optimal read accuracy, creating a closed-loop adaptive system.
2Adaptability or versatility
If read threshold is tracked per time-and-temperature group, then some adaptation to environmental variations is achieved, but additional effort and resource consumption increase
Solution Approach 1:
The patent applies local quality by implementing read threshold tracking at the wordline level rather than grouping entire blocks by time-and-temperature characteristics. Each wordline maintains its own read threshold voltage, allowing localized adaptation to specific wordline variations without requiring complex group-level tracking and management overhead.
Solution Approach 2:
The read threshold tracker operates autonomously on-chip, automatically detecting memory cell characteristic variations and adjusting read thresholds without requiring external intervention or complex host processor involvement. The system self-manages the adaptation process, reducing the burden on external resources while maintaining high adaptability.
3Device complexity
If static read thresholds are used without adaptation, then device complexity is reduced, but memory reliability decreases due to inability to handle cell characteristic drift
Solution Approach 1:
The read threshold tracker is implemented as a self-managing on-chip component that automatically monitors and adjusts read threshold voltages without requiring external control or complex management logic. This self-service approach maintains device simplicity while enabling continuous adaptation to memory cell variations, thereby preserving reliability.
Solution Approach 2:
The system transitions from static read thresholds to dynamic thresholds that automatically adapt to memory cell characteristic changes. The read threshold tracker continuously updates thresholds based on real-time detection of cell drift, ensuring reliable reads without requiring complex external intervention or management overhead.
Data Source
AI summary
A bit error rate (BER) estimation scan (BES) typically uses static read thresholds during the scan process. These fixed thresholds might not adapt to variations in memory cell characteristics, leading to suboptimal BER estimation and error correction. The embodiments presented herein can be used to address this problem by providing a hybrid variation of BES and on-chip (e.g., in a controller ASIC) threshold voltage (Vth) tracking. In one example, BER results from BES failing pages are used to update Vth tracking parameters. In this way, BER results can be used to identify the most unreliable memory pages, and the Vth tracking parameters can be updated to reduce the BER for those pages. Other examples are provided.