Memory Read Threshold Tracking Using Device-Originated Error Metrics

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing memory read voltage threshold calibration techniques are inaccurate and latency-prone, failing to effectively track voltage distribution shifts due to random workloads and operating conditions, leading to uncorrectable read data.

Innovation Solution

Utilizing memory device-originated metrics, such as failed byte count and failed bit count, to iteratively adjust read voltage thresholds, minimizing latency and ensuring accuracy by mapping these metrics to voltage threshold adjustments through lookup tables or mathematical transformations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If existing memory read voltage threshold calibration techniques are used, then the calibration process can be performed, but the accuracy is insufficient and latency is high

Engineering Contradiction:
Improvevoltage threshold calibration accuracyVSAvoidcalibration latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The memory device performs self-calibration by utilizing its own internal metrics (failed byte count, failed bit count) to adjust read voltage thresholds. This self-service approach eliminates the need for external calibration equipment and reduces calibration latency while improving accuracy through device-originated feedback.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The calibration process implements feedback mechanisms where the memory device monitors its own read operations, identifies failed bytes or bits, and uses this feedback information to iteratively adjust voltage thresholds. The feedback loop continuously refines calibration accuracy by comparing actual read outcomes with expected results and making real-time voltage adjustments.

Inventive Principle:
Principle #23Feedback

2Reliability

If voltage threshold calibration is performed to improve read accuracy, then bit error rate decreases, but data transfer bandwidth is reduced

Engineering Contradiction:
Improvebit error rateVSAvoiddata transfer bandwidth
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs partial calibration by calibrating only specific voltage thresholds that are most critical for current operating conditions rather than all thresholds. This selective approach maintains sufficient read accuracy while minimizing the impact on data transfer bandwidth by reducing the time spent on calibration operations.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

Voltage threshold calibration is performed periodically rather than continuously, allowing normal data transfer operations to proceed at full bandwidth between calibration cycles. The periodic calibration maintains reliability by updating voltage thresholds at appropriate intervals without constantly interrupting data transfer and reducing bandwidth.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS20250372188A1Memory read voltage threshold tracking based on memory device-originated metrics characterizing voltage distributions
Publication Date: 2025.12.04 MICRON TECHNOLOGY INC
  • US20250372188A1 patent drawing
  • US20250372188A1 patent drawing
  • US20250372188A1 patent drawing

AI summary

Described are systems and methods for memory read threshold tracking based on memory device-originated metrics characterizing voltage distributions. An example memory device includes: a memory array having a plurality of memory cells and a controller coupled to the memory array. The controller is to receive one or more values of a metric characterizing threshold voltage distributions of a subset of memory cells. The controller is further to determine, via one or more calibration operations, one or more voltage threshold adjustment values based on the one or more values of the metric. The controller is further to apply the one or more voltage threshold adjustment values of reading the subset of memory cells.