Nonvolatile Memory Cell Programming with Split Threshold Margins
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Solution Overview
Problem
Flash memory devices experience increased data read errors due to small differences in threshold voltages of memory cells, which affect the reliability and accuracy of data storage.
Innovation Solution
A nonvolatile memory device is designed with different error margins for memory cells based on signal lines, allowing for distinct threshold voltage distributions and improved programming states to enhance data reliability and reduce error probabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single threshold voltage distribution is used for all memory cells, then the device structure is simple, but data read errors increase due to small threshold voltage differences
Solution Approach 1:
The patent segments the memory cells into different groups based on their signal line characteristics (first DQ line group and second DQ line group). Each group is assigned a distinct threshold voltage distribution (first program state with lower threshold voltage, second program state with higher threshold voltage). This segmentation allows the system to optimize for different error correction scenarios while maintaining manageable complexity through organized grouping.
Solution Approach 2:
Different regions of the memory device are assigned different threshold voltage distributions based on their local characteristics. Memory cells connected to the first DQ line group use a first threshold voltage distribution, while those connected to the second DQ line group use a second threshold voltage distribution. This local differentiation addresses specific error characteristics of each signal line group, improving overall data read accuracy without requiring complete redesign of the entire memory structure.
2Reliability
If error margins are uniformly set for all memory cells, then the programming process is simple, but error correction burden increases due to insufficient error margin differentiation
Solution Approach 1:
The error margin configuration is segmented according to DQ line groups. The first DQ line group memory cells are programmed with a first error margin suitable for their specific signal characteristics, while the second DQ line group memory cells use a second error margin optimized for their characteristics. This segmentation enables targeted error correction strategies for different signal paths, improving correction efficiency without requiring completely individualized configuration for each cell.
Solution Approach 2:
Each DQ line group receives locally optimized error margin settings based on their specific electrical characteristics and error patterns. This local quality approach allows the system to address error-specific needs of different signal lines while maintaining a structured, manageable configuration system rather than requiring completely custom error margins for every individual cell or line.
3Manufacturing precision
If threshold voltage differences between memory cells are small, then the programming precision requirement is reduced, but data read errors increase
Solution Approach 1:
The patent divides memory cells into segments (first and second groups) that each use a distinct threshold voltage distribution. This segmentation allows each group to operate with relaxed precision requirements within its own distribution range, while the separation between distributions ensures sufficient margin for accurate reading. The segmented approach transforms a precision problem into a grouping problem that is easier to control.
Solution Approach 2:
Different local regions (DQ line groups) are assigned different threshold voltage distributions that are optimized for their specific characteristics. This local quality differentiation allows each region to operate with appropriate precision levels for its needs, rather than requiring all regions to meet a single high precision standard. The local optimization improves overall reliability while being more tolerant of manufacturing variations.
Data Source
AI summary
An operation method of a nonvolatile memory device includes receiving a first DQ signal representing a first data bit from an external device through a first DQ line and receiving a second DQ signal representing a second data bit from the external device through a second DQ line, and programming a first memory cell corresponding to the first DQ line and a second memory cell corresponding to the second DQ line such that the first memory cell has any one of an erase state and a first program state based on the first DQ signal and the second memory cell has any one of the erase state and a second program state based on the second DQ signal. A lower limit value of a threshold voltage distribution corresponding to the second program state is higher than a lower limit value of a threshold voltage distribution corresponding to the first program state.