Memory Device Staged Threshold Verification for Multi-Bit Programming

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Solution Overview

Problem

As the number of bits stored in one memory cell increases, the time required for program operations in memory devices also increases, leading to inefficiencies in data storage and retrieval.

Innovation Solution

A memory device and method that includes a peripheral circuit to detect low-level and high-level cells within a verify time, using a control circuit to control the peripheral circuit and adjust verify voltage and time based on the number of bits, allowing for the detection and reprogramming of cells to increase threshold voltage efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of bits stored in one memory cell increases, then the storage capacity of the memory device increases, but the time required for program operation increases

Engineering Contradiction:
Improvestorage capacityVSAvoidprogram operation time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The verify operation is segmented into multiple phases with different verify voltages. The peripheral circuit performs initial verification at a first verify voltage to identify cells needing reprogramming, then applies a second verify voltage for final verification. This segmentation allows efficient handling of multi-bit cells by processing them in stages rather than requiring complete programming verification for all cells simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The peripheral circuit performs preliminary detection of low-level cells (cells with threshold voltage between reference voltage and verify voltage) before the complete verify operation. This preliminary action identifies cells that need reprogramming, allowing the control circuit to target only those specific cells for additional programming cycles, thereby reducing the overall program operation time for multi-bit storage.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If the number of bits stored in one memory cell increases, then the storage capacity of the memory device increases, but the complexity of detecting and measuring threshold voltages increases

Engineering Contradiction:
Improvestorage capacityVSAvoidthreshold voltage detection complexity
Core Design Contradiction:
Quantity of substanceVSDifficulty of detecting and measuring

Solution Approach 1:

The threshold voltage detection process is segmented into multiple stages using different verify voltages. The peripheral circuit first detects cells at a lower verify voltage level, then performs additional detection at a higher verify voltage level. This segmentation simplifies the overall detection complexity by breaking down the multi-bit verification into manageable steps, where each stage handles specific voltage thresholds.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The peripheral circuit acts as an intermediary between the memory cells and the control circuit, performing the complex threshold voltage detection and classification work. It identifies low-level cells, high-level cells, and properly programmed cells, then provides this processed information to the control circuit. This intermediary role simplifies the control circuit's task while enabling sophisticated multi-bit detection capabilities.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If the verify time is extended to accurately detect all cell states, then the measurement precision increases, but the productivity of the memory device decreases

Engineering Contradiction:
Improvecell state detection accuracyVSAvoidprogram operation speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The peripheral circuit performs preliminary detection of cell states using a first verify voltage before completing the full verification process. This preliminary action quickly identifies low-level cells that need reprogramming, allowing the system to proceed with targeted reprogramming operations rather than waiting for complete verification of all cells. This maintains measurement precision while improving overall program operation speed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The verification process uses periodic action with multiple verify voltages applied at different times. The peripheral circuit first applies a lower verify voltage for initial detection, then applies a higher verify voltage for final verification. This periodic approach with staged voltage application ensures accurate cell state detection while minimizing the total verification time, thereby maintaining both measurement precision and productivity.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS12451203B2Memory device and method of operating the memory device
Publication Date: 2025.10.21 SK HYNIX INC
  • US12451203B2 patent drawing
  • US12451203B2 patent drawing
  • US12451203B2 patent drawing

AI summary

An embodiment of the present technology includes a memory device and a method of operating the memory device. The memory device includes a memory block, a peripheral circuit configured to increase a threshold voltage of memory cells selected among memory cells included in the memory block according to logic data, detect low-level cells having a threshold voltage higher than a reference voltage among memory cells having a threshold voltage lower than a verify voltage at a first time within a verify time set according the number of bits included into the logic data, and detect high-level cells having a threshold voltage higher than the verify voltage at a second time after the first time, and a control circuit configured to control the peripheral circuit in response to a command.