Semiconductor Memory Device With Localized Threshold Voltage Optimization

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Solution Overview

Problem

In semiconductor memory devices with multiple memory areas, optimizing initial threshold voltages is crucial to ensure accurate data storage and retrieval, especially when different memory areas have varying usage states, but existing methods do not effectively manage these voltages across distinct areas like data, flag, and extra areas.

Innovation Solution

The semiconductor memory device incorporates a structure where the initial threshold voltages of memory cells in the second memory area (such as the flag or extra area) are set higher than those in the first memory area (like the data area), optimizing each area's voltage settings to improve data integrity and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the initial threshold voltage is optimized for one memory area, then the data storage accuracy in that area is improved, but the performance of other memory areas deteriorates

Engineering Contradiction:
Improvedata storage accuracyVSAvoidperformance across multiple memory areas
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent applies local quality by forming different initial threshold voltages in different memory areas. Specifically, the first memory area has a first initial threshold voltage while the second memory area has a second initial threshold voltage that is higher than the first. This allows each memory area to be optimized for its specific function (data storage vs. flag/extra information storage) without compromising overall system performance.

Inventive Principle:
Principle #3Local quality

2Duration of action of stationary object

If the initial threshold voltage is increased to improve retention time, then the data retention is improved, but the window width balance deteriorates

Engineering Contradiction:
Improveretention timeVSAvoidwindow width balance
Core Design Contradiction:
Duration of action of stationary objectVSManufacturing precision

Solution Approach 1:

The patent implements local quality by setting different initial threshold voltage levels in different memory areas. The second memory area, which stores flag and extra information, has a higher initial threshold voltage that provides better retention time for these critical data types, while the first memory area maintains a lower threshold voltage that preserves adequate window width balance for general data storage operations.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10796768B2Semiconductor memory device
Publication Date: 2020.10.06 RENESAS ELECTRONICS CORP
  • US10796768B2 patent drawing
  • US10796768B2 patent drawing
  • US10796768B2 patent drawing

AI summary

It is to optimize the initial threshold voltages of each memory area in a semiconductor memory device including a plurality of memory areas. A semiconductor memory device according to the embodiment includes a first memory area for storing data and a second memory area for storing the information related to the first memory area. In the respective memory cells arranged in the first and the second memory areas, the initial threshold voltages of the memory cells arranged in the second memory area are designed to be higher than those of the memory cells arranged in the first memory area.