Memory Device Threshold Voltage Distribution Control
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Solution Overview
Problem
Flash memory devices face challenges in maintaining optimal threshold voltage distribution during high-speed programming, leading to reduced reliability and increased data degradation due to excessive voltage pulses in multiple program loops.
Innovation Solution
A memory device and method that utilize a voltage generator and control logic to manage program loops, applying verification voltages to determine successful programming and adjust threshold voltages, thereby improving threshold voltage distribution and reducing data degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple program loops are performed to program memory cells to multiple bits, then data storage capacity is improved, but threshold voltage distribution characteristics deteriorate
Solution Approach 1:
The patent divides the programming process into separate stages: first programming memory cells to n-th program states, then programming to (n+1)-th program states. Different verification conditions are applied for different program states, allowing precise control of threshold voltage distribution for each state while maintaining multi-bit storage capability.
Solution Approach 2:
The patent applies different verification conditions (different verification voltages) specifically for different program states. The control logic determines whether to apply the n-th verification condition or (n+1)-th verification condition based on the target program state, ensuring optimal verification for each local state rather than using a uniform verification approach.
2Productivity
If high speed program method is used to increase programming speed, then productivity is improved, but threshold voltage distribution characteristics deteriorate
Solution Approach 1:
The patent dynamically adjusts the verification process based on the programming state. The control logic selectively applies different verification conditions (n-th verification condition for n-th program state, (n+1)-th verification condition for (n+1)-th program state) to optimize both speed and distribution characteristics for each programming stage.
3Reliability
If verification operation is performed for all memory cells in all program loops, then reliability is improved, but processing time increases
Solution Approach 1:
The patent segments the verification process by program state. Instead of uniformly verifying all memory cells in all loops, the control logic applies verification conditions specifically tailored to the current program state (n-th or (n+1)-th), reducing unnecessary verification operations while maintaining reliability for actually programmed states.
Data Source
AI summary
Provided is a memory device with improved threshold voltage distribution and an operating method of the memory device. The memory device includes a memory cell array including a plurality of memory cells, a voltage generator configured to generate a program voltage and a verification voltage applied to the plurality of memory cells during a data write operation, and a control logic configured to control multiple program loops to program the memory cells to multiple program states during the data write operation and configured to determine whether programming passes or fails in the multiple program loops, wherein the control logic controls the program loops to verify one or more (n+1)-th memory cells to be programmed to an (n+1)-th program state by using a verify condition for verifying an n-th program state in at least one of the multiple program loops (n is an integer greater than or equal to 1).