3D Memory Through-Electrode Isolation to Prevent Word Line Bridging
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Solution Overview
Problem
Existing 3D nonvolatile memory devices face challenges in maintaining electrical isolation and reliability due to potential shorting of gate electrodes, particularly in areas with through electrodes and complex stack structures.
Innovation Solution
Incorporation of a second isolation insulating layer that intersects and electrically separates first isolation insulating layers, ensuring that through electrodes are isolated from the cell array area, thereby preventing word line bridging and enhancing device reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through electrodes are formed to penetrate mold layers for electrical connection, then electrical connectivity is improved, but risk of shorting between gate electrodes increases
Solution Approach 1:
A second isolation insulating layer is introduced as an intermediary element between the through electrode and the first isolation insulating layer. This second isolation insulating layer extends in the second horizontal direction and vertically penetrates the memory stack, creating an additional protective barrier that prevents direct contact between the through electrode and gate electrodes, thereby eliminating the shorting risk while maintaining electrical connectivity.
Solution Approach 2:
The isolation strategy transitions from a single-direction approach to a multi-dimensional approach. The first isolation insulating layers extend in the first horizontal direction, while the second isolation insulating layer extends in the second horizontal direction (crossing the first direction). This orthogonal arrangement creates a three-dimensional isolation network that comprehensively prevents shorting pathways.
2Reliability
If multiple isolation insulating layers are added to prevent shorting, then device reliability is improved, but device complexity increases
Solution Approach 1:
The isolation function is segmented into two distinct components: first isolation insulating layers extending in the first horizontal direction, and a second isolation insulating layer extending in the second horizontal direction. This segmentation allows each layer to perform a specialized isolation function, improving effectiveness while maintaining clear functional differentiation that simplifies design understanding.
Solution Approach 2:
The second isolation insulating layer serves multiple functions simultaneously: it provides electrical isolation between the through electrode and gate electrodes, acts as a physical barrier preventing word line bridging, and extends vertically to integrate with the existing memory stack structure. This multi-functionality reduces the need for additional separate components.
Data Source
AI summary
A semiconductor device includes a substrate including cell array, extension, and through electrode areas; a memory stack on the substrate and including first gate electrodes, insulating layers, and mold layers, the first gate electrodes and the insulating layers being sequentially stacked, and the mold layers including an insulating material and being on the through electrode area at a same level as the first gate electrodes; a channel structure vertically penetrating the first gate electrodes; a through electrode vertically penetrating the mold layers; first isolation insulating layers vertically penetrating the memory stack, extending in a first direction, and being spaced apart from each other in a second direction; and a second isolation insulating layer between the channel structure and the through electrode area and extending in the second direction and vertically penetrating the first gate electrodes, and in plan view, the second isolation insulating layer intersects the first isolation insulating layers.