Memory Tier Data Movement via Hardware Instructions

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Solution Overview

Problem

Conventional memory systems require significant operating system involvement for data movement across memory tiers, leading to performance overhead and complexity in managing data across different memory performance levels.

Innovation Solution

A set of processor and memory instructions that enable direct data copying, moving, or swapping across memory tiers within a memory sub-system, bypassing the need for operating system intervention, using a control logic to manage data movement and maintain mapping tables for efficient data location monitoring.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If operating system intervention is used for data movement across memory tiers, then data management control is improved, but computational overhead and performance deteriorate

Engineering Contradiction:
Improvedata management controlVSAvoidperformance
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent extracts the data movement control function from the operating system and implements it directly in hardware via new processor instructions. This allows data copying, moving, and swapping across memory tiers to occur at the hardware level without OS intervention, eliminating the performance overhead while maintaining control capabilities.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a memory sub-system with specialized control logic as an intermediary between the processor and memory devices. This intermediary handles tier management and data movement operations autonomously through dedicated instructions, reducing the burden on both the OS and processor while improving efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If operating system support is required for data movement, then system-level coordination is improved, but device complexity increases

Engineering Contradiction:
Improvesystem-level coordinationVSAvoidcomplexity in managing data
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent enables the memory sub-system to self-manage data across tiers through specialized processor instructions. The control logic within the memory sub-system autonomously handles data movement, tier management, and mapping updates without requiring complex OS-level coordination mechanisms, thereby reducing overall system complexity.

Inventive Principle:
Principle #25Self-service

3Productivity

If direct data movement instructions are implemented, then computational overhead is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvecomputational overhead reductionVSAvoidimplementation complexity
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent implements universal memory instructions that can handle multiple operations (copying, moving, swapping) across different memory tiers through a single instruction set framework. This multi-functional approach reduces the need for separate hardware implementations for each operation, thereby managing manufacturing complexity while achieving computational efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11797198B2Memory instruction for memory tiers
Publication Date: 2023.10.24 MICRON TECHNOLOGY INC
  • US11797198B2 patent drawing
  • US11797198B2 patent drawing
  • US11797198B2 patent drawing

AI summary

Various embodiments provide for one or more processor instructions and memory instructions that enable a memory sub-system to copy, move, or swap data across (e.g., between) different memory tiers of the memory sub-system, where each of the memory tiers is associated with different memory locations (e.g., different physical memory locations) on one or more memory devices of the memory sub-system.