Memory Tile Probe Pad Symmetry for Single Probe Card Testing

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Solution Overview

Problem

The existing test schemes for stacked memory devices require separate probe cards for front side and back side tests, increasing testing costs and complexity.

Innovation Solution

A memory tile with a probe pad arrangement featuring a first and second probe pad set on opposite surfaces, connected by conductive structures that maintain a mirror symmetry in test signal patterns, allowing a single probe card to be used for both front and back side tests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate probe cards are used for front side and back side tests, then testing reliability is improved, but device complexity and testing cost increase

Engineering Contradiction:
Improvetesting reliabilityVSAvoidtesting complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The probe pad arrangement enables a single probe card to perform both front side and back side testing by creating symmetry between the two surfaces. The first and second probe pad sets are arranged in mirror symmetry with corresponding conductive connections, allowing the same probe card design to interface with both surfaces without requiring separate specialized probe cards for each test type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent applies asymmetry in reverse by deliberately creating symmetry between the front and back surfaces. The probe pad sets are positioned and configured such that the arrangement pattern on the first surface mirrors the arrangement on the second surface, enabling a single probe card to work with both surfaces. This symmetric design resolves the contradiction by eliminating the need for asymmetric, surface-specific probe cards.

Inventive Principle:
Principle #4Asymmetry

2Measurement precision

If separate probe cards are used for front side and back side tests, then testing accuracy is maintained, but manufacturing cost increases

Engineering Contradiction:
Improvetesting accuracyVSAvoidmanufacturing cost
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The symmetric probe pad arrangement allows a single probe card design to serve dual purposes for both front side and back side testing. This universality reduces manufacturing costs by eliminating the need to produce, store, and manage multiple specialized probe cards while maintaining testing accuracy through the preserved signal integrity and proper signal routing enabled by the symmetric conductive connections.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the functionality of two separate probe card systems into a single unified system. By combining the front side and back side test capabilities into one probe card through symmetric probe pad arrangement, the solution reduces manufacturing complexity and cost while maintaining the measurement precision required for accurate testing.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If symmetric probe pad arrangement is implemented, then probe card versatility is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveprobe card versatilityVSAvoidprobe pad alignment precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent deliberately implements symmetry (the reverse of asymmetry) in the probe pad arrangement. By positioning the first and second probe pad sets in mirror symmetry with corresponding conductive connections, the design achieves probe card versatility while establishing clear manufacturing guidelines. The symmetric pattern, while precise, provides a repeatable manufacturing template that can be consistently produced with controlled precision requirements.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS20250105123A1Memory tile with probe pad arrangement and stacked memory device
Publication Date: 2025.03.27 POWERCHIP SEMICON MFG CORP
  • US20250105123A1 patent drawing
  • US20250105123A1 patent drawing
  • US20250105123A1 patent drawing

AI summary

A memory tile with a probe pad arrangement and a stacked memory device are provided. The memory tile has a first and a second surfaces; a first probe pad set, having first probe pads and provided on the first surface; a second probe pad set, having second probe pads and provided on the second surface; first conductive connections, each of which is connected to a corresponding first probe pad; second conductive connections, each of which is connected to a corresponding first conductive connection; third conductive connections, each of which is connected to a corresponding second conductive connection; and fourth conductive connections, each of which is connected to a corresponding third conductive connection and to a corresponding second probe pad. The first and the second probe pad sets have the same arrangement pattern, and the same test signal pattern.