Memory Controller Power Tracking via Token Ring LUN Reporting

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Solution Overview

Problem

Existing power management operations in memory systems are ineffective for quantities of logical unit numbers (LUNs) other than specific predefined counts, and do not account for power usage by application-specific integrated circuits (ASICs), leading to compatibility challenges and inefficient power tracking.

Innovation Solution

A power management system that utilizes a token ring configuration to track power usage for any quantity of LUNs and ASICs, allowing for increased bit communication to accurately report power usage, including multiple token ring instances assigned to a single ASIC, with additional bits for high power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If existing power management operations are used with predefined LUN quantities, then power tracking is simplified, but compatibility is reduced for systems with different LUN quantities

Engineering Contradiction:
ImprovecompatibilityVSAvoidpower management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal power management operation that can handle any quantity of LUNs and ASICs through a standardized token ring configuration. The system uses a configurable number of bits in the power usage field that can be adjusted based on the specific system requirements, allowing the same operation to serve systems with varying numbers of devices without requiring device-specific implementations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If power usage tracking is expanded to include ASICs and any quantity of LUNs, then power management accuracy is improved, but communication overhead increases

Engineering Contradiction:
Improvepower usage tracking accuracyVSAvoidcommunication bits
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent employs a dynamic bit allocation scheme where the number of bits used for power usage reporting is configurable based on the maximum expected power usage across all LUNs and ASICs. This allows the system to allocate more bits when higher precision is needed and fewer bits when the power usage range is limited, optimizing the balance between measurement precision and communication overhead.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of bit quantity in the power usage field dynamically according to the system configuration. By adjusting the number of bits allocated for power usage reporting, the system can accommodate different levels of precision requirements while controlling the communication overhead, thus resolving the contradiction between accurate tracking and efficient communication.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If multiple token ring instances are assigned to a single ASIC, then power usage reporting capability is enhanced, but system complexity increases

Engineering Contradiction:
Improvepower usage reporting capabilityVSAvoidtoken ring configuration complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the power usage reporting function by allowing multiple token ring instances to be assigned to a single ASIC. Each instance can independently report power usage for different operational modes or different groups of LUNs, enabling detailed and granular power monitoring. This segmentation approach enhances reporting capability while maintaining manageable complexity through modular organization.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12499952B2Power management associated with memory and controller
Publication Date: 2025.12.16 MICRON TECHNOLOGY INC
  • US12499952B2 patent drawing
  • US12499952B2 patent drawing
  • US12499952B2 patent drawing

AI summary

Methods, systems, and devices for power management associated with memory and a controller are described. A memory system performs a power management operation that accounts for power usage by any combination of application specific integrated circuits (ASICs) and memory arrays. The power management operation includes multiple logical unit numbers (LUNs) assigned to a single ASIC, which increases a quantity of bits for communicating a power usage. An ASIC included in a memory system may utilize twice as many bits for communicating power usage information when compared to a NAND array. As part of the power management operation, an ASIC may transmit, to a controller, a first set of bits indicating a power usage of the ASIC, a first subset of the set of bits transmitted during a first instance of a token ring and a second subset of the set of bits transmitted during a second instance of the token ring.