Memory Device Tracking Booster Circuit for Word Line Pulse Edge

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Solution Overview

Problem

Existing memory devices face challenges in simulating the timing behavior of a large number of memory cells due to large capacitive loading or parasitic capacitance, which degrades the edge of pulses applied to the word line.

Innovation Solution

Incorporating a tracking booster circuit that boosts the edge of a pulse applied to the tracking word line, allowing the tracking cell to better simulate the timing behavior of the memory cells and improve the edge of the pulse applied to the word line.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a large number of memory cells are connected to the word line, then the memory device capacity increases, but the capacitive loading and parasitic capacitance increase, degrading the pulse edge quality

Engineering Contradiction:
Improvenumber of memory cellsVSAvoidcapacitive loading and parasitic capacitance
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent divides the memory cell array into multiple segments, each with its own word line. Tracking cells are distributed across different segments to simulate the cumulative capacitive loading effect. This segmentation allows the tracking circuit to accurately model timing behavior for each segment while managing the overall capacitive burden.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The tracking cell acts as an intermediary between the control circuit and the actual memory cells. It simulates the timing behavior and capacitive loading effects without requiring direct connection to all memory cells, providing accurate timing information to the control circuit for optimizing word line pulse characteristics.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If the pulse width is reduced to improve operating speed, then the memory device speed increases, but the timing accuracy and simulation precision deteriorate

Engineering Contradiction:
Improveoperating speedVSAvoidtiming behavior simulation accuracy
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The tracking cell provides feedback information about timing behavior to the control circuit. Based on this feedback, the control circuit adjusts the word line pulse width and timing to achieve optimal performance. This feedback mechanism enables the system to maintain timing accuracy even with reduced pulse widths for higher operating speeds.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The tracking cell performs preliminary simulation of timing behavior before actual memory operations. This preliminary action allows the control circuit to pre-calculate optimal pulse widths and timing parameters, ensuring accurate timing control when operating at high speeds with narrow pulse widths.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If the edge transition time is increased to improve pulse quality, then the pulse edge quality improves, but the operating speed decreases

Engineering Contradiction:
Improvepulse edge qualityVSAvoidoperating speed
Core Design Contradiction:
Manufacturing precisionVSSpeed

Solution Approach 1:

The system dynamically adjusts the word line pulse characteristics based on real-time feedback from the tracking cell. The pulse edge transition time is optimized dynamically to balance quality and speed requirements, rather than using fixed parameters. This allows the system to achieve high operating speeds while maintaining adequate pulse edge quality.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The control circuit changes pulse parameters (width, amplitude, rise time) based on timing information from the tracking cell. By dynamically adjusting these parameters, the system achieves optimal pulse edge quality for each operating condition without sacrificing overall operating speed.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12334144B2Memory device including booster circuit for tracking word line
Publication Date: 2025.06.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12334144B2 patent drawing
  • US12334144B2 patent drawing
  • US12334144B2 patent drawing

AI summary

Disclosed herein are related to a memory device. In one aspect, the memory device includes a set of memory cells coupled to a word line, and a tracking cell coupled to a tracking word line and a tracking bit line. In one aspect, the memory device includes a tracking booster circuit coupled to the tracking word line. In one aspect, the tracking booster circuit is configured to boost a first edge of a first pulse applied to the tracking word line. In one aspect, the tracking cell is configured to generate a second pulse at the tracking bit line, in response to the first pulse having the boosted first edge. In one aspect, the memory device includes a word line controller configured to apply a third pulse to the word line, based on the second pulse.