Semiconductor Memory Data Training via CRC Error Signal
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Solution Overview
Problem
Existing semiconductor systems require a multi-purpose register (MPR) for data training, increasing circuit area and limiting data patterns, which hinders efficient data exchange between semiconductor memory and memory controllers.
Innovation Solution
A semiconductor system and method that utilize an error signal pin, such as a cyclic redundancy check (CRC) alert pin, to perform data training without an MPR, allowing the memory controller to detect error signals and adjust data patterns and write strobe signals for accurate data exchange.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a multi-purpose register (MPR) is used for data training, then data training can be performed, but the circuit area of the semiconductor memory increases
Solution Approach 1:
The patent extracts the data training function from the semiconductor memory device by using the error signal pin instead of requiring an MPR within the memory. The memory controller performs data training by manipulating error signals, separating the training functionality from the memory device itself and reducing its circuit area.
Solution Approach 2:
The error signal pin, originally designed for error indication, is given a multi-functional role by enabling it to carry data training information. The memory controller interprets error signal transitions to determine training parameters, allowing a single pin to serve both error reporting and data training purposes.
2Reliability
If a multi-purpose register (MPR) is used for data training, then data training can be performed, but the data pattern is limited
Solution Approach 1:
By removing the MPR dependency, the patent extracts the data pattern generation flexibility to the memory controller side. The controller can now generate and apply arbitrary data patterns during training without being constrained by the memory device's internal register capabilities.
Solution Approach 2:
The patent changes the operational parameters of the error signal pin to enable diverse data patterns. By utilizing different transition timings and error signal states, the system can represent various data patterns during training, expanding the versatility beyond what a fixed MPR could provide.
3Area of stationary object
If the error signal pin is used for data training, then circuit area is reduced, but the error signal activation timing must be precisely controlled
Solution Approach 1:
The patent implements a feedback mechanism where the memory controller monitors the error signal transitions and uses this information to determine training parameters. The controller adjusts its operations based on the observed error signal behavior, enabling precise timing control through iterative detection and adjustment.
Solution Approach 2:
The memory controller performs preliminary detection of error signal activation timing during the training process. By detecting the timing characteristics in advance and using this information to guide subsequent training operations, the system achieves precise timing control without requiring complex real-time adjustment mechanisms.
Data Source
AI summary
A semiconductor system includes a semiconductor memory configured to determine whether an error has occurred in a data pattern and generate an error signal, and a memory controller configured to provide the data pattern to the semiconductor memory and perform data training with respect to the semiconductor memory using the error signal.