Non-volatile Memory Device Trap Charge Stabilization

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Solution Overview

Problem

Non-volatile memory devices, particularly ferroelectric memory devices, face challenges in stabilizing the program state due to excessive trap charges, leading to increased threshold voltage and reduced integration density in three-dimensional structures.

Innovation Solution

A method is introduced where a pulse voltage with a polarity opposite to the program voltage is applied to the selected word line after the program voltage, followed by a verification voltage, to accelerate the release of excessive trap charges and stabilize the program state quickly, thereby reducing the threshold voltage and enhancing integration density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a program voltage is applied to program memory cells in a three-dimensional structure, then the program state is established, but excessive trap charges accumulate leading to unstable threshold voltage and reduced integration density

Engineering Contradiction:
Improveprogram state stabilityVSAvoidthreshold voltage control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies a pulse voltage with polarity opposite to the program voltage immediately after programming. This inverted voltage pulse removes excessive trap charges that were accumulated during the programming process, thereby stabilizing the threshold voltage and improving program state reliability without sacrificing integration density.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent converts the harmful effect of excessive trap charge accumulation into a beneficial process by intentionally applying an opposite polarity pulse voltage. This pulse voltage targets and removes the harmful trap charges, transforming the programming process from one that creates instability to one that achieves both programming and stabilization.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Reliability

If multiple program loops are used to program memory cells, then programming completeness is improved, but program time increases due to repeated verification cycles

Engineering Contradiction:
Improveprogramming completenessVSAvoidprogram time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies the opposite polarity pulse voltage immediately after the program voltage in the first program loop, before verification is completed. This preliminary stabilization action ensures that trap charges are removed early, allowing subsequent verification cycles to proceed more efficiently and reducing the total number of program loops needed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent maintains continuous useful action by seamlessly transitioning from program voltage application to opposite polarity pulse voltage application without interrupting the program loop. This continuous process ensures that programming and stabilization occur together, maximizing efficiency and reducing overall program time.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively stabilizes the program state by releasing excessive trap charges, reducing the threshold voltage, and improving the integration density of non-volatile memory devices, particularly in three-dimensional structures.

Implementation Method 1

excessive trap charges, leading to increased threshold voltage

Methodology Applied
Scientific EffectCharge trapping and release:

Implementation Method 2

a shift in the threshold voltage is determined by the polarization direction of a ferroelectric layer

Methodology Applied
Scientific EffectPolarization: Polarisation

Data Source

PatentUS20250095759A1Non-volatile memory device and a method of operating the same
Publication Date: 2025.03.20 SAMSUNG ELECTRONICS CO LTD
  • US20250095759A1 patent drawing
  • US20250095759A1 patent drawing
  • US20250095759A1 patent drawing

AI summary

A method of operating a memory device, the method including: applying a program inhibition voltage to an unselected bit line in a first program loop of a plurality of program loops; applying a program permission voltage to a selected bit line in the first program loop; applying a pass voltage to an unselected word line in the first program loop; applying a program voltage to a selected word line in the first program loop; applying a pulse voltage having a polarity opposite to a polarity of the program voltage to the selected word line after applying the program voltage to the selected word line, in the first program loop; and applying a verification voltage to the selected word line after applying the pulse voltage to the selected word line, in the first program loop.