Self-Aligned Trench Formation in Memory Device Fabrication

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Solution Overview

Problem

The complexity of photolithography processes in fabricating memory devices leads to misalignment and increased process variation in forming isolation structures and dielectric layers, necessitating a method to simplify the fabrication process and reduce costs.

Innovation Solution

A method involving a substrate with distinct regions, where a stack layer is patterned and a filling layer is used as a mask to form trenches and buried dielectric layers, allowing for simultaneous formation of isolation structures without requiring multiple photolithography processes, utilizing dry or wet etching techniques and materials like photoresist or organic dielectric materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple photolithography processes are used to form isolation structures and dielectric layers, then the memory device can be fabricated with proper electrical insulation, but the process complexity increases and misalignment occurs between isolations and dielectric layers

Engineering Contradiction:
Improvealignment precisionVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The filling layer serves dual purposes: it acts as a mask for etching trenches and simultaneously defines the positions of isolation structures and dielectric layers. This self-aligned approach eliminates the need for multiple separate photolithography processes, preventing misalignment while simplifying the fabrication workflow

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent combines the formation of isolation structures and dielectric layers into a single integrated process step. By using the filling layer as a common mask for both structures, the previously separate photolithography and etching processes are merged, reducing process complexity and improving alignment precision

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If multiple photolithography processes are used to form isolation structures and dielectric layers, then the memory device can be fabricated with proper electrical insulation, but the fabrication cost increases

Engineering Contradiction:
Improveelectrical insulation integrityVSAvoidfabrication cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The filling layer automatically serves as the mask for forming both isolation structures and dielectric layers, eliminating the need for additional paid photolithography services. This self-aligned method maintains electrical insulation integrity while reducing fabrication costs by streamlining the process into fewer steps

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The filling layer performs multiple functions: it serves as the mask for trench etching, defines the pattern for isolation structures, and establishes the layout for dielectric layers. This multi-functionality reduces the number of separate fabrication steps required, thereby lowering overall manufacturing costs while ensuring proper electrical insulation

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the fabrication process, reduces process variation, and lowers costs by enabling self-aligned trench formation and simultaneous creation of buried dielectric and isolation structures, thereby improving the integrity and efficiency of memory device production.

Implementation Method 1

a method of removing the filling layer includes a dry etching process

Methodology Applied
Scientific EffectDry etching:

Implementation Method 2

a method of removing the filling layer includes a wet etching process

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS9070753B1Method for fabricating memory device
Publication Date: 2015.06.30 MACRONIX INTERNATIONAL CO LTD
  • US9070753B1 patent drawing
  • US9070753B1 patent drawing
  • US9070753B1 patent drawing

AI summary

Provided is a method for fabricating a memory device. A stack layer, including a storage layer, a first conductive layer and a first mask layer, is formed on the substrate in a first region and a second region. The stack layer is patterned to form a plurality of first patterned stack layers extending along a first direction and from the first region to the second region. Two sides of each first patterned stack layers have openings respectively. A filling layer is formed on the substrate, and filled in the openings. A second mask layer is formed on the second region, and does not cover the filling layer in the second region. Then, using the second mask layer and the filling layer as mask, the first patterned stack layers and part of the substrate are removed, and a plurality of trenches are formed in the substrate in the second region.