Memory Trim Set Selection for Cross-Temperature Reliability
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Solution Overview
Problem
Memory devices experience reliability issues and inefficient operation when subjected to cross-temperature conditions, where the temperature difference between data write and read operations exceeds acceptable ranges, leading to unstable device performance.
Innovation Solution
Selecting a memory trim set based on a temperature metric and a program-erase (P/E) cycle metric to optimize memory operation parameters, such as program voltage step size and verify levels, to mitigate the effects of cross-temperature conditions and improve device reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If memory operations are performed under cross-temperature conditions (large temperature difference between write and read operations), then the device can operate in diverse environmental conditions, but the reliability and operation efficiency decrease
Solution Approach 1:
The patent implements dynamic selection of memory trim sets based on detected temperature conditions. The system transitions from static, fixed trim values to dynamic, temperature-adaptive trim selection, allowing the memory device to optimize its operation parameters according to real-time thermal conditions. This dynamic adaptation resolves the contradiction by enabling reliable operation across varying temperature ranges through continuous parameter adjustment.
Solution Approach 2:
The patent changes operational parameters (trim sets including program voltage step size, verify levels, and other write operation parameters) based on temperature metrics. By implementing multiple trim sets with different parameter configurations and selecting the appropriate set based on detected temperature conditions, the system maintains reliability across diverse thermal environments while preserving operational versatility.
2Adaptability or versatility
If memory operations are performed under cross-temperature conditions, then the device can handle varying operational scenarios, but the operation efficiency decreases
Solution Approach 1:
The patent performs preliminary temperature detection and trim set selection before executing memory write operations. By detecting the temperature metric in advance and pre-selecting the appropriate trim set, the system avoids inefficient trial-and-error operations during actual write operations. This preliminary action ensures optimal operation efficiency is achieved from the start, while maintaining the ability to adapt to varying temperature scenarios.
3Device complexity
If fixed memory trim values are used for write operations, then the device structure and control logic are simple, but the device cannot adapt to different temperature conditions leading to reliability issues
Solution Approach 1:
The patent segments the memory trim parameters into multiple distinct trim sets, each optimized for specific temperature ranges. Instead of using a single fixed trim configuration, the system divides the parameter space into multiple discrete configurations (trim sets with different program voltage step sizes, verify levels, etc.). This segmentation allows the device to maintain simple control logic for each individual trim set while achieving adaptive reliability through selective deployment of appropriate segments based on temperature conditions.
Data Source
AI summary
Techniques disclosed herein can be used to improve cross-temperature coverage of memory devices and improve memory device reliability in cross-temperature conditions. More specifically, a memory trim set can be selected from multiple candidate memory trim sets when performing a memory operation (such as a memory write operation), based on a temperature metric and a P/E cycle metric for the memory device. The candidate memory trim sets include multiple respective memory trim values (e.g., memory configuration parameters, such as program voltage step size, program pulse width, program verify level, etc., as discussed above) for performing the memory operation. The temperature metric can be indicative of a temperature of at least a region of the memory device (e.g., the entire device, a memory plane, a memory block, etc.), and the P/E cycle metric can be indicative of a number of P/E cycles performed by the memory device within a selected time interval.