Memory Trim Settings for Pitch Doubling Uniformity
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Solution Overview
Problem
Conventional flash memory devices use a single trim setting for all blocks and word lines, which is not suitable for the varying critical dimension differences caused by pitch doubling patterning technology, leading to inconsistent programming and read operations due to decreased uniformity of side wall oxides and etching.
Innovation Solution
Implementing a method to assign individual trim settings to specific portions of the memory device, such as pages, blocks, or columns, with a trim set register containing multiple trim settings, including program voltage, step-up voltage, and program pulse width, to accommodate variations in geometry and programming speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single trim setting is used for all blocks and word lines, then device complexity is reduced and ease of operation is improved, but manufacturing precision deteriorates due to critical dimension differences between even and odd column and row lines
Solution Approach 1:
The memory device is divided into multiple segments (even column blocks, odd column blocks, even row blocks, odd row blocks) with each segment receiving a dedicated trim setting. This segmentation allows independent optimization of trim parameters for each segment, addressing the critical dimension variations caused by pitch doubling patterning while maintaining manageable device complexity through systematic organization.
Solution Approach 2:
Different trim settings are applied to different spatial locations within the memory device based on their specific characteristics. Even column blocks receive one trim setting, odd column blocks receive another, and similarly for rows. This local quality approach ensures that each region operates with optimal trim parameters tailored to its geometric variations, thereby improving manufacturing precision without requiring complete redesign of the entire device.
2Ease of operation
If a single trim setting is applied to all pages, then ease of operation is improved, but reliability deteriorates due to varying programming speeds across different page configurations
Solution Approach 1:
The trim setting system transitions from a static, uniform configuration to a dynamic, adaptive configuration where the appropriate trim setting is automatically selected based on the specific page being accessed. The system dynamically adjusts trim parameters according to the page's geometric characteristics (even/odd row and column combinations), ensuring optimal programming reliability for each page while maintaining ease of operation through automated selection.
Solution Approach 2:
Different trim parameters (program voltage, step-up voltage, program pulse width) are changed and optimized for different page configurations. By varying these parameters based on the specific page's programming speed characteristics, the system achieves reliable programming across all pages without requiring manual intervention, thus maintaining ease of operation while improving reliability.
3Manufacturing precision
If multiple trim settings are implemented for different portions of the memory, then manufacturing precision is improved by accommodating geometric variations, but device complexity increases
Solution Approach 1:
The trim setting structure is designed to serve multiple functions simultaneously: it provides accurate manufacturing precision for different geometric configurations while maintaining a unified, manageable architecture. The same trim setting mechanism handles even columns, odd columns, even rows, and odd rows through a systematic multi-function design, preventing excessive device complexity despite the multiple trim settings required.
Solution Approach 2:
The trim setting system adds a new dimension of organization by introducing block-level segmentation (even/odd column blocks, even/odd row blocks) in addition to the existing page-level structure. This dimensional expansion allows precise manufacturing accommodation through multiple trim settings while organizing the complexity into a hierarchical, manageable framework that prevents uncontrolled device complexity growth.
Data Source
AI summary
A method and apparatus for setting trim parameters in a memory device provides multiple trim settings that are assigned to portions of the memory device according to observed or tested programming speed and reliability.