Memory Bank UBD Alert Signaling on a Shared Error Interface
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Solution Overview
Problem
Increasing chip density in memory devices leads to electromagnetic coupling between adjacent memory cells, causing voltage fluctuations and memory errors due to usage-based disturbances (UBD), which existing UBD detection circuits complicate and increase power consumption, making them unsuitable for space-constrained devices.
Innovation Solution
Implement UBD alert signaling that combines UBD alerts with memory error signals on a shared interface, using bank-level and die-level UBD alert signals, with backoff logic to meet external timing parameters, allowing efficient UBD detection and mitigation without a dedicated external interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing mitigation circuits are implemented to address UBD, then data reliability is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent combines UBD alert signals with existing memory error signals by sharing the same interface and signal generation mechanisms. The alert circuitry integrates with the error detection circuitry, allowing both UBD alerts and memory errors to be detected and signaled through a unified system, thereby avoiding the complexity of separate dedicated interfaces for UBD mitigation.
Solution Approach 2:
The interface and alert circuitry are designed to serve multiple functions: detecting both UBD events and memory errors, and signaling both types of events through the same pathway. This multi-functional design eliminates the need for separate dedicated interfaces for UBD mitigation, reducing overall device complexity while maintaining reliability.
2Reliability
If existing mitigation circuits are implemented to address UBD, then data reliability is improved, but power consumption increases
Solution Approach 1:
The patent combines UBD alert signals with existing memory error signals by sharing the same interface and signal generation mechanisms. The alert circuitry integrates with the error detection circuitry, allowing both UBD alerts and memory errors to be detected and signaled through a unified system, thereby avoiding the complexity of separate dedicated interfaces for UBD mitigation.
Solution Approach 2:
The interface and alert circuitry are designed to serve multiple functions: detecting both UBD events and memory errors, and signaling both types of events through the same pathway. This multi-functional design eliminates the need for separate dedicated interfaces for UBD mitigation, reducing overall device complexity while maintaining reliability.
3Measurement precision
If dedicated external interfaces are used for UBD alert signaling, then detection accuracy is improved, but device complexity increases
Solution Approach 1:
The patent combines UBD alert signals with existing memory error signals by sharing the same interface and signal generation mechanisms. The alert circuitry integrates with the error detection circuitry, allowing both UBD alerts and memory errors to be detected and signaled through a unified system, thereby avoiding the complexity of separate dedicated interfaces for UBD mitigation.
Solution Approach 2:
The interface and alert circuitry are designed to serve multiple functions: detecting both UBD events and memory errors, and signaling both types of events through the same pathway. This multi-functional design eliminates the need for separate dedicated interfaces for UBD mitigation, reducing overall device complexity while maintaining reliability.
Data Source
AI summary
Apparatuses and techniques for implementing usage-based-disturbance alert signaling are described. The technology allows usage-based-disturbance (UBD) alerts to be externally communicated from a memory device without a dedicated external interface. Rather, UBD alerts are combined with memory error/alert signals and communicated on a shared alert-related interface. UBD tracking occurs at the memory bank level, with corresponding independent UBD alert signals. These signals are efficiently combined to generate an overall UBD alert. A temporary backoff signal is generated when an overall UBD alert is sent. The backoff signal ensures requisite external timing parameters are met while allowing the individual memory banks to generate persistent UBD alerts.