Memory Device Under-Drive Operation Voltage Control
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Solution Overview
Problem
Existing memory devices face challenges in reducing the time required for read and verify operations, particularly due to inefficiencies in the under-drive operation which affects the setting and distinction of memory cell states.
Innovation Solution
The memory device incorporates a row decoder capable of performing an under-drive operation by decreasing the voltage level of the selected word line and applying specific operating voltages, including ground voltage and under-drive voltage, to optimize the read and verify processes based on different memory cell states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the memory device performs traditional read operations without optimized under-drive operation, then the operation flow is simple, but the time required for read and verify operations is excessive
Solution Approach 1:
The patent segments the under-drive operation into multiple distinct voltage levels (first under-drive voltage and second under-drive voltage) and applies them at different time points during the read operation. This segmentation allows optimized timing control for different memory cell states, reducing the overall operation time without requiring complex additional hardware beyond the existing row decoder structure.
Solution Approach 2:
The patent implements dynamic voltage adjustment by changing the word line voltage from an initial level to different under-drive voltage levels at different stages of the read operation. The row decoder dynamically selects and applies appropriate voltage levels based on the operation phase, enabling adaptive optimization of read and verify times while maintaining manageable device complexity through controlled dynamic behavior.
2Measurement precision
If the memory device applies single voltage level during under-drive operation, then the control logic is simple, but the distinction between different memory cell states is insufficient
Solution Approach 1:
The patent applies different voltage levels (first under-drive voltage and second under-drive voltage) to the word line at different time points to create locally optimized conditions for detecting different memory cell states. This local quality approach allows the system to distinguish between various states with higher precision by matching specific voltage conditions to specific detection needs, while keeping the overall control logic relatively simple through sequential voltage application.
Solution Approach 2:
The patent employs periodic voltage adjustments during the read operation, applying under-drive voltages at specific intervals and phases. The first under-drive voltage is applied during the initial read phase, and the second under-drive voltage is applied during the verify phase, creating a periodic pattern of voltage application that enhances state distinction capability without requiring continuously complex control mechanisms.
3Reliability
If the memory device decreases word line voltage level during under-drive operation, then the word line setting is improved, but the operation time increases
Solution Approach 1:
The patent applies the first under-drive voltage level before the main read operation to pre-condition the memory cells and improve word line setting in advance. This preliminary action ensures that when the actual read operation occurs, the voltage levels are already optimized for reliable detection, thereby improving reliability without significantly extending the critical path operation time.
Solution Approach 2:
The patent uses two distinct under-drive voltage levels to quickly transition through different detection phases. The first under-drive voltage level is applied briefly for initial detection, and the second under-drive voltage level is applied for verify operations. This approach allows the system to rush through the under-drive operation phases efficiently, minimizing the total duration while maintaining reliable word line setting through the use of optimized voltage levels.
Data Source
AI summary
Provided herein are a memory device and a method of operating the memory device. The memory device may include a memory cell array including a plurality of memory cells coupled to a selected word line, a voltage generator configured to generate an operating voltage that is used for an internal operation, a row decoder configured to perform an under-drive operation including decreasing a voltage level of the selected word line and to apply the operating voltage to the selected word line, and control logic configured to control the row decoder to apply a ground voltage to the selected word line during the under-drive operation.


