Non-Volatile Memory Undo Logging for Crash-Safe Writes

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Solution Overview

Problem

The use of non-volatile memory devices in computing systems introduces challenges in managing intermediate data states during operations, as power outages or failures can leave data in invalid intermediate states, making recovery difficult without significant additional instructions and checks.

Innovation Solution

Implementing an undo logging operation that saves memory states before a transaction and uses metadata to manage the operation, allowing for efficient rollback or commit of memory changes, with resource overhead proportional to the amount of memory modified rather than the number of modifications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is written to flash memory cells, then storage capacity is utilized, but bit-serial programming requires multiple programming pulses which increases programming time and wear

Engineering Contradiction:
Improvestorage capacity utilizationVSAvoidprogramming time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent divides the programming operation into multiple voltage levels (e.g., 0V, 1.8V, 3.6V, 5.4V) applied sequentially to the word line. Each voltage level programs a subset of bits in the memory block, allowing parallel programming of multiple bits simultaneously rather than bit-serial programming. This segmentation of the programming process into voltage-level stages enables faster programming while reducing the total number of programming pulses required.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary voltage levels to program subsets of bits before applying the final programming voltage. For example, bits are first programmed at 1.8V, then 3.6V, and finally 5.4V to achieve the desired threshold voltage distribution. This preliminary action allows the memory device to prepare the charge storage state progressively, reducing the time required for complete programming compared to applying a single high voltage pulse.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multiple programming pulses are applied to flash memory, then data is programmed, but program disturb occurs affecting unprogrammed cells

Engineering Contradiction:
Improvedata programming reliabilityVSAvoidprogram disturb
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies different voltage levels to different subsets of memory blocks during programming. For example, while Block 0 is being programmed at 5.4V, Block 1 might be at 3.6V and Block 2 at 1.8V. This local differentiation of voltage levels ensures that only the targeted block receives the full programming voltage, minimizing program disturb to unprogrammed cells in other blocks. The selective application of voltage levels to specific blocks reduces the harmful effects of program disturb while maintaining programming reliability.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If conventional programming voltage levels are used, then programming is simple, but threshold voltage distribution has large variance reducing reliability

Engineering Contradiction:
Improveprogramming simplicityVSAvoidthreshold voltage distribution precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent dynamically adjusts the programming voltage levels applied to different memory blocks based on their programming status and desired threshold voltage targets. Instead of using a fixed voltage level for all blocks, the system adaptively selects from multiple voltage levels (0V, 1.8V, 3.6V, 5.4V) to program bits to specific threshold voltage ranges. This dynamic voltage adjustment enables precise control over the threshold voltage distribution, reducing variance and improving reliability while maintaining programming flexibility.

Inventive Principle:
Principle #15Dynamics

4Productivity

If fast programming is implemented, then productivity increases, but program disturb to unprogrammed blocks increases

Engineering Contradiction:
Improveprogramming speedVSAvoidprogram disturb to unprogrammed blocks
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent segments the memory array into multiple independently controllable blocks, each programmable at different voltage levels simultaneously. This segmentation allows the system to apply high programming voltages to selected blocks for fast programming while maintaining lower voltages on adjacent blocks to prevent program disturb. By dividing the memory space into manageable segments with independent voltage control, the system achieves high programming speed for active blocks while protecting unprogrammed blocks from harmful effects.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP4384895B1Undo capability for memory devices
Publication Date: 2026.05.20 MICRON TECHNOLOGY INC
  • EP4384895B1 patent drawingFigure 1
  • EP4384895B1 patent drawingFigure 2
  • EP4384895B1 patent drawingFigure 3

AI summary

Disclosed in some examples are methods, systems, memory devices, and machine-readable mediums that allows an application thread to indicate an undo logging operation when calculations are beginning that may need to be rolled back if a crash or other failure occurs. During the undo logging operation, memory writes an identified memory are done to a copy and the original value is preserved. If the undo logging operation is committed, then the copy becomes the correct value and may then be subsequently used in place of the original, or the value stored in the copy is copied to the original. If the undo logging operation is abandoned, the copy is not preserved and the value goes back to the original.