Semiconductor Memory Device Uniform Rectifying Direction
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in efficiently managing the current rectifying direction of memory cells, leading to increased manufacturing costs and complexity, especially in achieving reliable access and reducing power consumption in three-dimensional cross-point memory arrays.
Innovation Solution
A semiconductor memory device with a memory cell array configuration where all memory cells have a uniform current rectifying direction, utilizing a peripheral circuit that alternates the roles of x and y lines as bit and word lines based on the cell's anode and cathode orientation, allowing for efficient voltage application during setting, resetting, and read operations, and incorporating a specific cell structure like Ag/a-Si/n-Si to maintain a dead-band voltage for reduced disturb risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If memory cells are arranged in a cross-point type array with inverted current rectifying direction via wiring layers, then memory cell miniaturization is achieved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent divides the memory cell array into multiple blocks, where each block has memory cells with the same current rectifying direction. This segmentation allows independent control of each block without requiring complex wiring layer inversions, thus reducing device complexity while maintaining miniaturization benefits
Solution Approach 2:
Instead of inverting the current rectifying direction through wiring layers as in conventional designs, this patent inverts the approach by maintaining uniform current rectifying direction across all memory cells and using control circuit logic to manage access patterns, thereby simplifying the physical wiring structure
2Quantity of substance
If conventional cross-point memory arrays are used with inverted current direction, then memory density increases, but power consumption increases due to additional wiring control
Solution Approach 1:
The patent extracts the current direction control function from the wiring layer structure and relocates it to the control circuit logic. This separation eliminates the need for power-intensive wiring layer inversions while maintaining high memory density through efficient logical control of memory cell access
3Adaptability or versatility
If wiring layers are used to invert current rectifying direction, then memory cell access flexibility is improved, but manufacturing cost increases
Solution Approach 1:
The patent makes the control circuit universal by designing it to handle multiple memory cell blocks with different access patterns through software-configurable logic. This multi-functional control approach eliminates the need for dedicated wiring layer inversions for each access pattern, reducing manufacturing cost while preserving access flexibility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration simplifies manufacturing, reduces power consumption, and prevents mistaken resetting or setting of memory cells, enhancing the reliability and efficiency of data access in the memory device.
Implementation Method 1
each of the memory cells having a variable resistance characteristic and a current rectifying characteristic, and adopting one end as an anode and the other end as a cathode according to the current rectifying characteristic
Data Source
AI summary
According to an embodiment, a semiconductor memory device comprises: a memory cell array configured having a plurality of memory cell mats, the memory cell mats including a plurality of first lines, second lines, and memory cells, and the memory cell mats being stacked such that the first and second lines are shared alternately by each of the memory cell mats; and a peripheral circuit. Each of the memory cells has a variable resistance characteristic and a current rectifying characteristic. An orientation from an anode toward a cathode of all the memory cells is identical. The peripheral circuit applies to one of the first line and the second line connected to an anode side of the selected memory cell a selected bit line voltage, and applies to the other a selected word line voltage.