Memory Unit Operation Controller for Downstream Capability Routing

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Solution Overview

Problem

Traditional memory systems face inefficiencies in handling complex far operations due to varying processing capabilities across memory units, leading to increased costs and complexity in implementing advanced processing circuitry and managing operation requests.

Innovation Solution

A memory unit with an operation controller and downstream capabilities storage determines whether to perform or forward operation requests based on the location of target data and the capabilities of downstream memory units, allowing for efficient handling of operations without uniform processing capabilities across the system.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If processing circuitry is implemented at multiple levels of the memory system to handle complex far operations, then the capability to perform operations is improved, but the device complexity and cost increase

Engineering Contradiction:

Improvecapability to perform complex far operationsVSAvoidcomplexity of processing circuitry

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Different memory units are provided with different processing capabilities depending on their location and function. Upstream memory units have more complex processing circuitry while downstream units have simpler circuitry, allowing the system to handle complex far operations without requiring every memory unit to have full processing capabilities.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The system dynamically determines where to perform operations by checking downstream capabilities storage and making real-time decisions about whether to execute operations locally or forward them downstream, based on current system state and operation requirements.

Inventive Principle:

Principle #15Dynamics

2Ease of operation

If all memory units are provided with uniform processing capabilities, then the ease of operation is improved, but the manufacturing cost increases

Engineering Contradiction:

Improvesimplicity of handling operationsVSAvoidmanufacturing cost

Core Design Contradiction:

Ease of operationVSEase of manufacture

Solution Approach 1:

Instead of uniform processing capabilities, the system implements differentiated processing capabilities at different locations. Each memory unit has processing circuitry tailored to its specific function and position in the hierarchy, reducing manufacturing costs while maintaining operational simplicity through standardized interfaces.

Inventive Principle:

Principle #3Local quality

3Reliability

If operation requests are propagated through all levels of the memory system, then the reliability of operation handling is improved, but the loss of time increases

Engineering Contradiction:

Improvereliability of operation handlingVSAvoidtime to perform operations

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

Downstream capabilities storage is updated in advance with information about which operations can be performed at downstream memory units. This preliminary preparation allows upstream memory units to make informed decisions about operation routing without needing to propagate requests through all levels, reducing operation time while maintaining reliability.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system uses feedback from downstream capabilities storage to determine the optimal location for operation execution. By knowing in advance which downstream units can handle specific operations, the system can route requests more efficiently and avoid unnecessary propagation through the entire memory hierarchy.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS11010297B2Memory unit and method of operation of a memory unit to handle operation requests

Publication Date: 2021.05.18 ARM LTD

AI summary

A memory unit includes a data storage to store data, an operation controller to receive operation requests issued by an upstream source, a downstream capabilities storage to store an indication of operations performable by at least one downstream memory unit, and processing circuitry to perform operations on data stored in the data storage under control of the operation controller. When an operation request to perform an operation on target data is received from the upstream request source, the operation controller is arranged to determine when to control the processing circuitry to perform the operation, and when to forward the operation to a downstream memory unit in dependence on whether the target data is stored in the data storage unit and the indication of operations performable by at least one downstream memory unit. This allows for operations to be executed at a suitable location within a memory system, taking into account not only where the data resides, but also the complexity of the operation and the capabilities of the processing circuitry provided at various memory locations within the memory system.