Semiconductor Memory Verification Circuit for Data Integrity
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Solution Overview
Problem
Conventional NAND flash memory systems face challenges in verifying the correct programming of input data due to potential failures in the page buffer/sensing circuit and transmission path, leading to incorrect data programming, especially with advancements in miniaturization and high data transmission speeds.
Innovation Solution
A semiconductor storage device with a verification method that includes a comparison component to verify input data by comparing data held in a data holding component with data read from the memory array, allowing for determination of component malfunctions and re-inputting data when inconsistencies are found, ensuring accurate data programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is transmitted at high speeds through the input buffer and driver to the page buffer/sensing circuit, then productivity is improved, but reliability deteriorates due to potential failures in the transmission path and page buffer/sensing circuit
Solution Approach 1:
The patent applies preliminary action by verifying input data before it is programmed to the memory array. The verification circuit reads the input data from the page buffer/sensing circuit and compares it with the original data from the input buffer, detecting errors before programming occurs. This prevents incorrect data from being written to the memory array, thereby maintaining reliability while allowing high-speed data transmission.
Solution Approach 2:
The patent implements feedback by creating a verification loop where the verification circuit reads data from the page buffer/sensing circuit and compares it with the original input data. This feedback mechanism detects transmission errors and allows the system to identify and correct issues before programming, ensuring data integrity while maintaining high transmission speeds.
2Reliability
If a verification circuit is added to compare input data with read data, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the verification circuit to perform multiple functions: it reads data from the page buffer/sensing circuit, compares it with original input data, and provides verification results to the control circuit. This multi-functional approach achieves reliable data verification without requiring entirely separate dedicated circuits for each function, thereby limiting the increase in device complexity.
Solution Approach 2:
The patent uses the control circuit as an intermediary that coordinates between the input buffer, verification circuit, and page buffer/sensing circuit. The control circuit manages the verification process by controlling the verification circuit's operations and using comparison results to determine whether programming should proceed, simplifying the overall system architecture while maintaining reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively verifies the correct holding of input data within the semiconductor storage device, preventing incorrect programming and identifying potential malfunctions in the data holding component or transmission path, thus ensuring reliable data storage.
Implementation Method 1
a verification circuit, verifying the input data by reading the input data from the page buffer/sensing circuit and comparing the read input data with the input data
Data Source
AI summary
A semiconductor memory device and a verification method which can verify data taken inside external terminals are provided. The semiconductor memory device of the invention includes external input/output terminals for inputting or outputting data, a memory array 110 and a page buffer/sensing circuit 170. The page buffer/sensing circuit 170 holds input data inputted from the external input/output terminals and the held input data can be programmed to the memory array 110. Further, the semiconductor memory device includes comparing circuit 132. The comparing circuit 132 compares input data held in the page buffer/sensing circuit 170 and the input data read from the page buffer/sensing circuit 170.