Non-Volatile Memory Verification with Selective Pass Masking

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Solution Overview

Problem

Existing nonvolatile memory devices face inefficiencies in program verification operations due to the need for comprehensive pass bit masking across all threshold voltage levels, which prolongs the programming time and resource utilization.

Innovation Solution

A memory device and method that selectively applies pass bit masking based on threshold voltage levels, allowing for targeted verification and minimizing unnecessary masking operations by determining the need for masking based on the number of program failures within specific threshold groups.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If comprehensive pass bit masking is applied to all threshold voltage levels, then verification accuracy is improved, but programming time is prolonged

Engineering Contradiction:
Improveverification accuracyVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the verification process by dividing threshold voltage levels into different groups (first group and second group). The first group undergoes comprehensive pass bit masking verification to ensure high accuracy, while the second group uses a simplified verification process that counts program failures without full masking. This segmentation allows the system to maintain verification accuracy for critical threshold levels while reducing overall programming time through the optimized verification of other levels.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If pass bit masking operation is performed on all groups, then verification precision is improved, but resource consumption increases

Engineering Contradiction:
Improveverification precisionVSAvoidresource consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies different verification qualities to different groups based on their specific needs. The first group, which requires high verification precision, receives comprehensive pass bit masking operations. The second group, where high precision is less critical, receives a simplified verification process that counts program failures without performing full masking operations. This local quality approach ensures that resources are consumed only where necessary for high-precision verification, thereby reducing overall resource consumption while maintaining adequate verification precision.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12488845B2Apparatus and method for programming and verifying data in non-volatile memory device
Publication Date: 2025.12.02 SK HYNIX INC
  • US12488845B2 patent drawing
  • US12488845B2 patent drawing
  • US12488845B2 patent drawing

AI summary

A memory device comprises: a memory cell array including multiple cells have program states divided on a basis of N threshold voltage levels, and a controller configured to: divide, into N groups corresponding to the N threshold voltage levels, cells selected as a verification target, and perform, if a selected group of the N groups corresponds to remaining threshold voltage levels except a highest threshold voltage level among the N threshold voltage levels, a pass masking operation of determining the selected group to have a program pass state when a number of cells checked to have a program fail state in the selected group is less than a reference number in a verification interval included in a program operation, wherein the controller is configured not to perform, if the selected group corresponds to the highest threshold voltage level, the pass masking operation on the selected group in the verification interval.