Non-Volatile Memory Program-Verify with Lower Current Ramping
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Non-volatile memory systems consume high current during programming and verification processes, leading to inefficient battery usage and potential overheating in mobile devices.
Innovation Solution
Implement a low current program-verify operation by scanning the results of a previous program-verify operation while ramping up voltages on select lines for the next program-verify operation without waiting for the scan to complete, and similarly ramping up voltages on unselected word lines following a step signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional program-verify operation is used, then programming verification is completed accurately, but current consumption is high
Solution Approach 1:
The patent applies preliminary action by pre-charging bit lines to an intermediate voltage level before the actual program-verify operation. This preliminary voltage preparation reduces the voltage swing required during verification, thereby reducing current consumption while maintaining verification accuracy. The bit lines are charged to an intermediate voltage state in advance, so that when verification occurs, less current is needed to detect the programmed state.
Solution Approach 2:
The patent changes the voltage parameter of bit lines from traditional full-swing voltages to intermediate voltage levels during program-verify operations. By operating bit lines at reduced voltage levels (intermediate between ground and full supply voltage), the current consumption is significantly reduced while still enabling accurate detection of programmed states through differential sensing techniques.
2Measurement precision
If traditional program-verify operation is used, then programming verification is completed accurately, but device overheating occurs
Solution Approach 1:
By pre-charging bit lines to intermediate voltage levels before verification, the patent reduces the instantaneous power dissipation during program-verify operations. This preliminary voltage preparation spreads the energy consumption over a longer time period and at lower intensity, preventing heat buildup and device overheating while maintaining verification functionality.
Solution Approach 2:
The patent changes operational voltage parameters to intermediate levels, which directly reduces power dissipation (P=IV²). By operating at reduced voltage levels during program-verify, the thermal load on the device is significantly reduced, preventing overheating issues that occur with traditional full-voltage operations.
3Measurement precision
If voltage ramping waits for scan completion, then scanning accuracy is maintained, but operation time increases
Solution Approach 1:
The patent applies preliminary action by initiating voltage ramping on select lines and unselected word lines before the scan operation completes. This overlapping of operations allows voltage preparation to occur concurrently with scanning, reducing total operation time while maintaining scan accuracy through proper timing control and voltage stabilization before verification.
Solution Approach 2:
The patent implements continuity of useful action by eliminating idle waiting time between scan completion and voltage ramping. Instead of sequential execution, the system continuously performs useful actions by overlapping scan operations with voltage preparation, ensuring that no time is wasted and that all operations proceed in parallel where possible.
Data Source
AI summary
A memory system programs memory cells connected to a selected word line by applying doses of programming and performing program-verify between doses. An efficient and low current program-verify operation includes: while scanning the results of a previous program-verify operation, ramp up voltages on the select lines for the next program-verify operation without waiting for the scan to complete and ramp up voltages on unselected word lines for the next program-verify operation following a step signal (so that voltage applied to the unselected word lines rise in steps) without waiting for the scan to complete.