Non-Volatile Memory Verify Operation Leakage Compensation

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Solution Overview

Problem

The fast verify operation in non-volatile memory devices is limited by leakage current, particularly at high temperatures, which causes the bit line precharge voltage level to drop, leading to errors in verify operations.

Innovation Solution

A method that involves sensing the temperature and controlling the level of the sensing bias voltage based on the sensed temperature, either by adjusting it dynamically during verify operations or by counting the number of consecutive verify operations without precharge and adjusting the bias voltage when a set value is exceeded, to maintain the bit line precharge level.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fast verify operation is performed multiple times without precharge, then write performance is improved, but bit line precharge voltage level drops due to leakage current

Engineering Contradiction:
Improvewrite performanceVSAvoidverify operation accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The sensing bias voltage is dynamically adjusted based on the number of consecutive verify operations performed. The voltage level changes from a first level during initial verify operations to a second level when a predetermined number of operations are exceeded, allowing the system to adapt to temperature-induced leakage current variations without sacrificing write performance

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the sensing bias voltage parameter in response to temperature variations. When the number of consecutive verify operations exceeds a threshold, the sensing bias voltage level is adjusted to compensate for increased leakage current, thereby maintaining bit line precharge voltage stability and verify operation accuracy

Inventive Principle:
Principle #35Parameter changes

2Reliability

If sensing bias voltage is increased to compensate for leakage current, then bit line precharge level is maintained, but power consumption increases

Engineering Contradiction:
Improvebit line precharge level stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

Instead of continuously applying maximum sensing bias voltage, the patent applies a higher voltage level only partially - specifically when the number of consecutive verify operations exceeds a predetermined threshold. This partial application of excessive voltage compensates for leakage current only when necessary, avoiding unnecessary power consumption during normal operation

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8582368B2Non-volatile memory device and operating method of the same
Publication Date: 2013.11.12 SK HYNIX INC
  • US8582368B2 patent drawing
  • US8582368B2 patent drawing
  • US8582368B2 patent drawing

AI summary

A method for operating a non-volatile memory device includes counting the number of consecutive verify operations performed without a precharge, sensing a temperature, and when the number of verify operations exceeds a set value of verify operations, controlling a level of a sensing bias voltage based on the sensed temperature.