Nonvolatile Memory Verify Level Adjustment for Coupling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In non-volatile semiconductor memory, particularly in multi-state flash memory devices, the coupling between adjacent floating gates leads to erroneous readings due to shifts in the apparent charge stored, causing memory cells to be misread as they are programmed at different times or concurrently, exacerbated by shrinking cell sizes and increased coupling effects.
Innovation Solution
The solution involves adjusting the verify level during programming to compensate for perturbations caused by neighboring memory cells, ensuring accurate reading by accounting for the target state and predetermined states of neighboring cells, thereby minimizing the Yupin effect through data-dependent verify levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If cell size is reduced to increase memory density, then storage capacity is improved, but coupling between adjacent floating gates increases causing reading errors
Solution Approach 1:
The patent applies preliminary anti-action by adjusting the verify level during programming to preemptively counteract the coupling effect from neighboring cells. Before reading the data, the system modifies the verify threshold based on the programmed states of adjacent cells, thereby preventing the coupling effect from causing reading errors in the first place
Solution Approach 2:
The patent changes the verify level parameter dynamically based on the states of neighboring memory cells. By adjusting this critical parameter according to the coupling conditions, the system maintains reading accuracy despite the increased coupling effects from smaller cell sizes
2Quantity of substance
If multiple memory states are implemented to increase storage capacity, then data density is improved, but threshold voltage ranges become narrower making cells more susceptible to coupling effects
Solution Approach 1:
The patent applies local quality by tailoring the verify level adjustment to the specific local coupling conditions. Different verify level corrections are applied depending on the states of neighboring cells, allowing the system to maintain precise threshold voltage measurements even with narrow ranges required for multi-state operation
Solution Approach 2:
The system dynamically adjusts the verify level parameter based on the programmed states of adjacent cells. This parameter change compensates for the reduced threshold voltage separation in multi-state devices, ensuring accurate reading despite the narrower allowed ranges
3Productivity
If concurrent programming of adjacent cells is performed to increase programming speed, then productivity is improved, but coupling during concurrent programming causes threshold voltage shifts
Solution Approach 1:
The patent implements feedback by using the known programmed states of neighboring cells to adjust the verify level for the target cell. This feedback mechanism allows the system to account for coupling effects from concurrently programmed adjacent cells, maintaining threshold voltage accuracy despite parallel programming operations
Solution Approach 2:
The system performs preliminary action by adjusting the verify level before the reading operation, taking into account the states of neighboring cells that are being programmed concurrently. This preliminary adjustment prevents coupling-induced threshold shifts from affecting the final read accuracy
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for accurate data reading by compensating for neighboring cell charges during programming, reducing errors and maintaining accurate threshold voltage ranges, even as cell sizes decrease and coupling increases, thereby enhancing memory reliability.
Implementation Method 1
Electrons from the channel are injected into the floating gate. When electrons accumulate in the floating gate, the floating gate becomes negatively charged and the threshold voltage of the memory cell is raised
Implementation Method 2
Shifts in the apparent charge stored on a floating gate can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates
Data Source
Figure 1~3
Figure 4
Figure 5
AI summary
Shifts in the apparent charge stored on a charge storing element of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent charge storing elements. To compensate for this coupling, the programming process for a given memory cell can take into account the target programmed state of one or more adjacent memory cell. The amount of programming is verified after each programming pulse and the standard verify level for the programming cell is dependent on the target state. The verify level is further offset lower dependent on the amount of perturbation from neighboring cells, determinable by their target states. The verify level is preferably virtually offset by biasing adjacent word lines instead of actually offsetting the standard verify level. For soft-programming erased cells, neighboring cells on both adjacent word lines are taken into account.