Memory Cell Verify Offset Tuning by Program-Erase Cycle Count
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Solution Overview
Problem
Existing memory systems fail to account for charge loss due to program-erase cycles (PECs) when determining program verify voltages, leading to limited performance in program verify, read, and write operations.
Innovation Solution
Adjusting program verify offset magnitude based on the PEC count of memory cells to compensate for charge loss, applying higher offsets for higher PEC counts and lower offsets for lower PEC counts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed program verify voltage is used for all memory cells, then the device complexity is reduced, but the measurement precision of program verify operations deteriorates due to unaccounted charge loss from PECs
Solution Approach 1:
The patent implements dynamic adjustment of program verify voltages based on PEC count. The system transitions from a static, fixed verify voltage to a dynamic voltage that adapts to the memory cell's wear state. The controller selects different verify voltages (e.g., first verify voltage for low PEC count, second verify voltage for high PEC count) to account for charge loss variations, thereby maintaining measurement precision without requiring complex multi-level voltage structures for all cells simultaneously.
Solution Approach 2:
The patent changes the parameter of program verify voltage magnitude based on the PEC count parameter. By establishing a correspondence between PEC count ranges and specific verify voltage levels, the system adjusts the verify voltage parameter to compensate for charge loss. This parameter change approach allows the system to maintain accurate program verification across cells with different wear states while managing device complexity through structured voltage levels.
2Ease of operation
If program verify operations do not account for PEC-induced charge loss, then the ease of operation is maintained, but the reliability of program verify operations deteriorates
Solution Approach 1:
The patent implements feedback by monitoring the PEC count of memory cells and using this information to adjust program verify operations. The controller receives PEC count information (either directly or through wear level indicators) and feeds this back into the verify voltage selection process. This feedback mechanism ensures that verify operations adapt to actual cell conditions, improving reliability while maintaining operational simplicity through automated controller management.
Solution Approach 2:
The patent applies preliminary action by pre-establishing the correspondence between PEC count ranges and verify voltage levels before program verify operations execute. The system pre-configures different verify voltage levels for different wear states, so that when verification is needed, the appropriate voltage is already selected based on the cell's PEC count. This preliminary preparation ensures reliable verification without adding complexity to the actual verify operation execution.
3Manufacturing precision
If charge loss from PECs is not compensated, then the manufacturing precision requirements are reduced, but the productivity of memory operations deteriorates due to increased rework
Solution Approach 1:
The patent changes the verify voltage parameter based on PEC count to compensate for charge loss. By establishing structured voltage levels corresponding to different wear states, the system maintains adequate manufacturing precision requirements without requiring overly complex voltage control. This parameter adjustment approach prevents verification failures that would necessitate rework, thereby improving productivity by ensuring first-time correctness of program operations.
Solution Approach 2:
The feedback mechanism through PEC count monitoring enables the system to adapt verify operations to actual cell conditions. This feedback prevents verification failures caused by unaccounted charge loss, reducing the need for rework and improving memory operation throughput. The automated nature of the feedback loop maintains manufacturing precision while boosting productivity by eliminating costly and time-consuming rework cycles.
Data Source
AI summary
Methods, systems, and devices for configurable program verify levels according to PECs at a memory system are described. The described techniques provide for a memory system to adjust a program verify offset magnitude when performing a program verify operation on a memory cell according to a program-erase cycle (PEC) count of the memory cell. For example, due to higher PEC counts being associated with relatively higher charge loss rates, the memory system may apply a relatively higher program verify offset to the memory cell when the PEC count of the memory cell is relatively high and may apply a relatively lower program verify offset to the memory cell when the PEC count of the memory cell is relatively low.