Memory Device Verify-Pass Voltage Control for Complete Programming
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Solution Overview
Problem
Existing memory devices suffer from the generation of under-programmed memory cells, which can lead to data errors and incorrect output during read operations, particularly as target levels increase.
Innovation Solution
A memory device and system that includes a memory block, peripheral circuit, and control logic, which perform a program loop with incremental Step Pulse Program (ISPP) method, increasing the verify pass voltage for unselected word lines when threshold voltages of memory cells exceed a reference level, ensuring complete programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional programming methods are used, then programming speed is maintained at acceptable levels, but under-programmed memory cells are generated leading to data errors
Solution Approach 1:
The patent implements periodic verify operations interspersed with program pulse operations. The control logic repeatedly performs program loops where each loop includes a program pulse operation followed by a verify operation, creating a periodic action that ensures complete programming while maintaining acceptable speed through structured iteration.
Solution Approach 2:
The patent employs feedback mechanisms where the control logic receives feedback signals from verify operations and adjusts subsequent program pulse operations accordingly. When threshold voltages of memory cells are measured during verify operations, the control logic uses this feedback to determine whether additional programming iterations are needed, preventing under-programmed cells while optimizing the programming process.
2Reliability
If verify pass voltage is increased to prevent under-programming, then data reliability improves, but device complexity increases
Solution Approach 1:
The patent implements dynamic adjustment of verify pass voltage levels based on programming iterations and memory cell threshold voltage measurements. The control logic adapts the verify pass voltage dynamically during different stages of programming, increasing it when necessary to prevent under-programming while maintaining lower levels during normal operation, thus balancing reliability with complexity.
Solution Approach 2:
The patent changes the parameter of verify pass voltage based on programming conditions. The control logic modifies verify pass voltage levels according to the number of programming iterations completed and the measured threshold voltages of memory cells, allowing the system to maintain high reliability through appropriate voltage adjustment without requiring constant maximum voltage application.
Data Source
AI summary
A memory device includes a memory block, peripheral circuit, and control logic. The memory block includes a plurality of pages coupled to a plurality of word lines, respectively. The peripheral circuit is configured to perform a program loop including a program pulse operation of applying a program voltage to a selected word line, and a verify operation of applying at least one verify voltage corresponding to the program voltage to the selected word line and applying a verify pass voltage to unselected word lines. The control logic is configured to increase a level of the verify pass voltage applied to at least one unselected word line among the unselected word lines whenever the peripheral circuit performs the next program loop when threshold voltages of memory cells included in a page coupled to the selected word line are greater than a reference level.