Memory Device Verify-Voltage Checks for Soft-Error Detection
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Solution Overview
Problem
As the size of memory circuits in flash memory devices decreases, errors in stored data occur due to soft errors in device information, leading to improper operation and data discrepancies.
Innovation Solution
A memory device and operation method that includes applying verify voltages based on device information, detecting errors through level differences in verify codes, and correcting errors using a refresh operation to ensure reliable data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the size of memory circuit is decreased to increase integration degree, then storage capacity is improved, but error rate in stored data increases
Solution Approach 1:
The patent applies preliminary action by performing error detection on device information before it causes data storage errors. The control logic circuit detects errors in device information (such as verify voltage values) before these errors propagate to the memory cells during programming operations, thereby preventing reliability issues while maintaining high integration
Solution Approach 2:
The patent introduces an intermediary error detection mechanism between the device information storage and the data storage operations. The control logic circuit acts as an intermediary that verifies device information integrity before it is used in programming operations, isolating the high-density memory circuit from error propagation while maintaining storage capacity
2Productivity
If verify voltages are applied based on device information, then program verify operation is performed, but soft errors in device information cause detection failures
Solution Approach 1:
The patent implements feedback by using multiple verify voltages (first verify voltage and second verify voltage) to cross-validate device information. The error detection circuit compares results from different verify voltage applications, creating a feedback mechanism that identifies soft errors that would be missed by single-verify-voltage methods, thereby maintaining detection accuracy while preserving operational efficiency
Solution Approach 2:
The patent applies partial or excessive action by using more verify voltages than the minimum single required for programming. By applying both first and second verify voltages with different thresholds, the system performs excess verification to detect soft errors, ensuring reliability without significantly impacting program verify operation timing
Data Source
AI summary
A method of operating a memory device which includes a memory circuit, is provided. The method includes: receiving a program command, an address, and data from a controller; and performing a program operation on a selected word line corresponding to the address according to the program command to store the data. The program operation includes: applying a first program voltage to the selected word line; applying a first verify voltage and a second verify voltage to the selected word line based on device information stored in the memory circuit; and detecting an error status of the device information stored in the memory circuit, based on a level difference of the first verify voltage and the second verify voltage.