Memory Via Contact Layout for Lower Access Line Resistance
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Solution Overview
Problem
In memory devices, the barrier material above vias introduces unwanted resistance in contacts between access lines and vias, affecting the performance of the memory device.
Innovation Solution
The barrier material is removed from above the vias, and the vias are placed in direct contact with the access line material, reducing resistance and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If barrier material is present above vias, then electrical insulation is improved, but contact resistance increases
Solution Approach 1:
The barrier material is segmented spatially: it is present above memory cell stacks to provide electrical insulation, but removed above vias to enable direct contact. This segmentation allows different regions to serve different functions - insulation where needed and conductivity where needed - resolving the contradiction between electrical insulation and low contact resistance.
Solution Approach 2:
The structure transitions from a uniform barrier material layer to a non-uniform distribution where the barrier material is selectively removed above vias. This local quality change ensures that the barrier material provides insulation above memory cells while allowing direct metal-to-via contact above vias, thereby reducing contact resistance in critical areas.
2Reliability
If barrier material is removed from above vias, then contact resistance decreases, but electrical insulation is compromised
Solution Approach 1:
The barrier material distribution is segmented into regions: retained above memory cell stacks for insulation, and removed above vias for conductivity. This spatial segmentation resolves the contradiction by ensuring insulation is maintained where electrical isolation is needed while allowing direct contact where low resistance is critical.
Solution Approach 2:
The access line material acts as an intermediary that directly contacts the via when barrier material is removed. This direct metal-to-metal contact provides low resistance while the surrounding barrier material structure maintains overall electrical insulation integrity by preventing unintended connections.
Data Source
AI summary
Methods, systems, and devices for low resistance via contacts in a memory device are described. A via may be formed so as to protrude from a surrounding material. A barrier material may be formed above an array area and also above the via. After a first layer of an access line material is formed above the barrier material, a planarization process may be applied until the top of the via is exposed. The planarization process may remove the access line material and the barrier material from above the via, but the access line material and the barrier material may remain above the array area. The first layer of the access line material may protect the unremoved barrier material during the planarization process. A second layer of the access line material may be formed above the first layer of the access line material and in direct contact with the via.