Semiconductor Memory Voltage Generation Circuit Peak Current Reduction
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Solution Overview
Problem
Current semiconductor memory devices face challenges in reducing peak current consumption due to the increasing demand for lower power consumption and current consumption, especially in highly dense and miniaturized devices, where the constant driving of multiple boosting circuits in the voltage generation circuit leads to decreased power efficiency.
Innovation Solution
A semiconductor memory device configuration that includes a voltage generation circuit with a plurality of boosting circuits connected in series and a switching circuit to selectively short-circuit some boosting circuits, allowing the number of driven circuits to increase gradually during the boost operation, thereby reducing peak current consumption while maintaining high power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple boosting circuits are constantly driven to generate high voltage, then voltage generation capability is improved, but peak current consumption increases
Solution Approach 1:
The patent applies dynamics by making the number of driven boosting circuits variable rather than fixed. The control circuit dynamically adjusts the number of active boosting circuits based on the required voltage level, transitioning from a static configuration to a dynamic one that adapts to different operational requirements, thereby reducing peak current consumption while maintaining voltage generation capability.
Solution Approach 2:
The patent segments the boosting circuit into multiple independent stages that can be selectively driven. Instead of driving all boosting circuits simultaneously, the control circuit activates only the necessary number of stages based on the required voltage level, dividing the overall function into manageable segments that can be independently controlled to reduce peak current consumption.
2Loss of energy
If the number of driven boosting circuits is increased gradually, then power efficiency is improved, but device complexity increases
Solution Approach 1:
The patent applies preliminary action by having the control circuit pre-determine and sequentially activate boosting circuits in a predetermined sequence based on the required voltage level. The control logic is designed in advance to manage the gradual activation process, reducing the real-time control burden and managing complexity through pre-planned operation sequences.
Data Source
AI summary
A semiconductor memory device includes a memory cell array, a voltage generation circuit that generates a voltage applied to the memory cell array, the voltage generation circuit including a plurality of boosting circuits connected in series between an input terminal and an output terminal, and a switching circuit configured to short-circuit one or more of the boosting circuits to the input terminal, and a control circuit that controls a conduction state of the switching circuit to vary the number of boosting circuits that are driven to generate the voltage applied to the memory cell array.