Two-Stage Voltage Calibration for Memory Power-Up

Solution Overview

Problem

Memory sub-systems face challenges in accurately recalibrating block families after power loss due to slow charge loss, leading to increased bit error rates and inefficient calibration processes that can result in incorrect assignment of voltage offsets, affecting data integrity and performance.

Innovation Solution

Implementing a two-stage voltage calibration process upon power-up, where a quick synchronization procedure initially selects the appropriate voltage offset bin based on error rates for temporary use, followed by a more accurate regular calibration to update the permanent metadata table, ensuring precise voltage offset associations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a regular calibration process is performed after power-up, then measurement precision of voltage offset assignment is improved, but calibration time and processing duration increase

Engineering Contradiction:

Improvevoltage offset assignment accuracyVSAvoidcalibration time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The calibration process is divided into two distinct stages: a quick synchronization procedure that performs initial calibration with reduced accuracy but fast execution, followed by a regular calibration process that performs accurate recalibration. This segmentation allows the system to achieve both speed and accuracy without requiring the full accurate calibration to complete immediately upon power-up.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The quick synchronization procedure performs a preliminary calibration action immediately after power-up to establish initial voltage offset assignments. This preliminary action prepares the system for operation while the more accurate regular calibration executes in the background or subsequently, ensuring both rapid startup and high measurement precision are achieved.

Inventive Principle:

Principle #10Preliminary action

2Productivity

If quick synchronization procedure is used, then calibration speed is improved, but measurement precision of voltage offset assignment deteriorates

Engineering Contradiction:

Improvecalibration speedVSAvoidvoltage offset assignment accuracy

Core Design Contradiction:

ProductivityVSMeasurement precision

Solution Approach 1:

The calibration process is divided into two distinct stages: a quick synchronization procedure that performs initial calibration with reduced accuracy but fast execution, followed by a regular calibration process that performs accurate recalibration. This segmentation allows the system to achieve both speed and accuracy without requiring the full accurate calibration to complete immediately upon power-up.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The quick synchronization procedure acts as an intermediary that provides immediate, sufficiently accurate calibration for initial operation. The regular calibration process then refines this intermediary result to achieve the final high-precision assignment. The intermediary approach allows the system to operate quickly while maintaining the option for precise calibration when needed.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Loss of time

If incorrect voltage offset bins are assigned, then calibration time is reduced, but bit error rate increases

Engineering Contradiction:

Improvecalibration timeVSAvoiddata integrity

Core Design Contradiction:

Loss of timeVSReliability

Solution Approach 1:

The calibration process is divided into two distinct stages: a quick synchronization procedure that performs initial calibration with reduced accuracy but fast execution, followed by a regular calibration process that performs accurate recalibration. This segmentation allows the system to achieve both speed and accuracy without requiring the full accurate calibration to complete immediately upon power-up.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The quick synchronization procedure performs a preliminary calibration that may occasionally assign incorrect voltage offset bins, but this is cushioned by the subsequent regular calibration process that corrects any errors. The preliminary incorrect assignments are temporary and do not permanently affect data integrity, as they are corrected during the regular calibration phase.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS20240386936A1Two-stage voltage calibration upon power-up of memory device

Publication Date: 2024.11.21 MICRON TECHNOLOGY INC

AI summary

An example method of two-stage voltage calibration upon power-up of a memory device comprises: identifying a set of memory pages that have been programmed within a time window; responsive to detecting a power up event, performing a first calibration operation with respect to the set of memory pages to determine a first value of a data state metric; identifying, among a plurality of voltage offset bins, a first voltage offset bin corresponding to the first value of the data state metric; storing, in a temporary metadata table, a first record associating the set of memory pages with the first voltage offset bin; performing a second calibration operation with respect to the set of memory pages to determine a second value of the data state metric, wherein a second accuracy of the second calibration operation exceeds a first accuracy of the first calibration operation; identifying, among a plurality of voltage offset bins, a second voltage offset bin corresponding to the second value of the data state metric; and storing, in a permanent metadata table, a record associating the set of memory pages with the second voltage offset bin.