Built-in Memory Chip Voltage Analysis for Abnormal Detection

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Solution Overview

Problem

The existing methods for diagnosing and troubleshooting abnormal hardware in computers, particularly with the BIOS system, are labor-intensive and inefficient, requiring manual switching of components like built-in memory, which consumes significant time and resources.

Innovation Solution

A test method that utilizes a test device coupled to the debug port of a motherboard to execute a test function within the BIOS, which creates a data file analyzing memory chip voltages and identifies abnormal chips, allowing for targeted replacement without desoldering the entire memory module.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If manual switching of hardware components is used for testing, then comprehensive hardware testing can be performed, but labor cost and time consumption increase significantly

Engineering Contradiction:
Improvehardware testing completenessVSAvoidtesting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs self-diagnosis through automated testing. The testing device automatically identifies abnormal memory chips by analyzing voltage data and comparing it with reference values, eliminating the need for manual component switching and significantly reducing labor costs and testing time while maintaining comprehensive testing coverage

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent replaces manual mechanical operations (physically switching hardware components) with an automated electronic testing system. The testing device uses electrical signals and data analysis to identify faulty memory chips, substituting the mechanical process of manual component replacement with an automated electronic diagnostic process

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If entire memory modules are replaced instead of individual chips, then hardware reliability is restored, but manufacturing complexity and cost increase

Engineering Contradiction:
Improvememory system reliabilityVSAvoidrepair process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the memory module into individual memory chips for targeted replacement. By identifying and replacing only the specific abnormal chip rather than the entire memory module, the system reduces repair complexity and cost while maintaining memory system reliability. The testing device provides precise location information for faulty chips, enabling selective replacement

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by treating each memory chip individually with different diagnostic and replacement decisions. Instead of uniformly replacing entire memory modules, the system identifies specific chips with abnormal voltage characteristics and targets only those for replacement, optimizing resource utilization and reducing unnecessary repairs

Inventive Principle:
Principle #3Local quality

3Measurement precision

If detailed voltage analysis of each memory chip is performed, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvememory chip voltage measurement precisionVSAvoidtesting device complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The testing device incorporates multi-functionality by integrating voltage measurement, data analysis, comparison with reference values, and abnormal chip identification into a single unified system. This universal approach achieves precise measurement of each memory chip's voltage characteristics without requiring separate complex devices for each function, thereby maintaining measurement precision while controlling overall device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10811115B1Test method for built-in memory in computer device
Publication Date: 2020.10.20 INVENTEC PUDONG TECH CORPOARTION
  • US10811115B1 patent drawing
  • US10811115B1 patent drawing
  • US10811115B1 patent drawing

AI summary

A test method for testing a built-in memory in a computer device includes the following operations. The built-in memory is tested by a test function of a basic input/output system (BIOS) in the computer device to create a data file. An analysis application is performed by a test device to analyze the data file. According to analyzing the data file, an abnormal memory chip is determined whether to exist in the built-in memory. The data file includes test data of memory chips in the built-in memory.