3D Cross-Point Memory Voltage Clamp Stabilization
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Solution Overview
Problem
Conventional nonvolatile memory apparatuses experience variations in resistance values due to wire resistance in bit and word lines, leading to inconsistent voltage application across resistance variable elements, affecting data writing and reading accuracy.
Innovation Solution
A nonvolatile memory apparatus with a three-dimensional cross-point configuration, utilizing voltage restricting means such as voltage clamp circuits, diodes, or transistors to maintain a constant voltage across resistance variable elements, ensuring consistent current pulses are applied, thereby stabilizing resistance values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage pulses are applied to word lines in conventional nonvolatile memory apparatus, then data can be stored in resistance variable elements, but wire resistance causes voltage division leading to variations in applied voltages across different elements
Solution Approach 1:
The patent applies equipotentiality by introducing voltage clamp circuits that maintain a constant voltage level across all resistance variable elements connected to a word line. The voltage clamp circuits ensure that despite variations in wire resistance, each element experiences the same voltage pulse, thereby eliminating voltage division effects and ensuring uniform resistance value changes across all elements.
Solution Approach 2:
The voltage clamp circuits act as intermediary devices between the word lines and the resistance variable elements. These clamps serve as mediators that regulate and standardize the voltage delivered to each element, compensating for the harmful effects of wire resistance and ensuring consistent electrical conditions across the memory array.
2Ease of operation
If equal voltage pulses are applied to all word lines, then operation is simplified, but variations in wire length cause different voltages to be applied to resistance variable elements
Solution Approach 1:
The voltage clamp circuits implement a feedback mechanism where the voltage across each resistance variable element is continuously monitored and regulated. When the voltage exceeds the predetermined threshold, the clamp circuit activates to reduce the voltage back to the threshold level, ensuring that all elements receive identical voltage pulses regardless of wire resistance variations.
3Manufacturing precision
If voltage clamps are added to suppress resistance variations, then resistance value consistency improves, but device complexity increases
Solution Approach 1:
The voltage clamp circuits are merged with the existing word line structure, allowing multiple resistance variable elements connected to the same word line to share common voltage clamping functionality. This integration approach reduces the overall number of discrete components needed while still providing individual voltage regulation for each element.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses variations in resistance values, ensuring accurate data writing and reading by maintaining a stable voltage across elements, reducing the impact of wire resistance and preventing potential element breakdown.
Implementation Method 1
each of the nonvolatile memory elements has a resistance variable layer whose resistance value changes reversibly in response to a current pulse supplied between a first electrode wire and a second electrode wire
Implementation Method 2
voltage restricting means provided within or outside the memory array, the voltage restricting means being connected to the first electrode wires, for restricting a voltage applied to the first electrode wires to a predetermined upper limit value or less
Data Source
AI summary
A nonvolatile memory apparatus comprises a memory array (102) including plural first electrode wires (WL) formed to extend in parallel with each other within a first plane; plural second electrode wires (BL) formed to extend in parallel with each other within a second plane parallel to the first plane and to three-dimensionally cross the plural first electrode wires; and nonvolatile memory elements (11) which are respectively provided at three-dimensional cross points between the first electrode wires and the second electrode wires, the elements each having a resistance variable layer whose resistance value changes reversibly in response to a current pulse supplied between an associated first electrode wire and an associated second electrode wire; and a first selecting device (13) for selecting the first electrode wires, and further comprises voltage restricting means (15) provided within or outside the memory array, the voltage restricting means being connected to the first electrode wires, for restricting a voltage applied to the first electrode wires to a predetermined upper limit value or less; wherein plural nonvolatile memory elements of the nonvolatile memory elements are connected to one first electrode wire connecting the first selecting device to the voltage restricting means.