Semiconductor Memory Internal Voltage Control for Power Optimization

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Solution Overview

Problem

Conventional internal voltage control apparatuses in semiconductor memory devices experience unnecessary current consumption due to simultaneous operation of driving signal generating units during voltage drop and boosting operations, and inefficient response times lead to increased power usage.

Innovation Solution

An internal voltage control apparatus with an enable signal generating unit and internal voltage driving unit that compares the internal voltage with a reference voltage to generate driving signals, allowing for controlled voltage boosting and dropping, and disabling the voltage drop operation until the next over-driving cycle, thereby reducing current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the first driving signal generating unit and the second driving signal generating unit operate simultaneously to control internal voltage, then the internal voltage can be quickly adjusted, but current consumption increases

Engineering Contradiction:
Improveinternal voltage adjustment speedVSAvoidcurrent consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by enabling the second driving signal generating unit only during specific periods when voltage drop operation is actually needed, rather than keeping it continuously active. The control signal selectively activates this unit based on the operational state, ensuring it operates only when necessary to reduce current consumption while maintaining quick voltage adjustment capability when required.

Inventive Principle:
Principle #19Periodic action

2Reliability

If the second driving signal generating unit is always active to handle voltage drop operations, then voltage control reliability is improved, but unnecessary current consumption occurs

Engineering Contradiction:
Improvevoltage control reliabilityVSAvoidunnecessary current consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies preliminary action by proactively controlling the activation of the second driving signal generating unit through a control signal. This unit is enabled in advance only when voltage drop operations are anticipated or detected, ensuring voltage control reliability is maintained when needed while preventing unnecessary current consumption during periods when voltage drop operations are not required.

Inventive Principle:
Principle #10Preliminary action

3Speed

If the internal voltage VCORE is boosted during over-driving operation, then the sensing speed is increased, but the internal voltage must be returned to original level requiring additional control operations

Engineering Contradiction:
Improvesensing speedVSAvoidtime to return voltage to original level
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent implements feedback by using a control signal that monitors the internal voltage state and the operational requirements to determine when to activate the second driving signal generating unit. This feedback mechanism ensures that voltage drop operations are triggered only when necessary to return the boosted internal voltage to its original level, optimizing the balance between maintaining enhanced sensing speed and efficiently restoring normal operating conditions.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7952393B2Semiconductor memory device
Publication Date: 2011.05.31 SK HYNIX INC
  • US7952393B2 patent drawing
  • US7952393B2 patent drawing
  • US7952393B2 patent drawing

AI summary

A semiconductor memory device includes an enable signal generating unit for generating an enable signal in response to an active signal and an internal voltage driving unit driven by the active signal and the enable signal, wherein the internal voltage driving unit drives an internal voltage by comparing the internal voltage and a reference voltage and then generating first and second driving signals, and wherein the enable signal generating unit receives the second driving signal and then determines enablement of the enable signal.