Memory Controller Read Voltage Shift for ECC Decode Recovery

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Solution Overview

Problem

Existing memory systems face challenges in accurately reading data from nonvolatile memory due to deviations in readout voltage, leading to decoding failures despite the use of error correction codes.

Innovation Solution

A memory system with a memory controller that employs a sign shift function to iteratively adjust readout voltages and reliability degree estimation to correct decoding failures by re-executing decoding processing with different readout voltages based on reliability degree information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed readout voltage is used for reading data from nonvolatile memory, then the reading process is simple and fast, but decoding failures occur due to voltage deviations

Engineering Contradiction:
Improvedecoding success rateVSAvoidreadout voltage control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic readout voltage adjustment by iteratively changing the readout voltage based on decoding results. The memory controller adjusts the readout voltage from an initial value and re-executes decoding when failure occurs, transforming the static voltage approach into a dynamic adaptive process that resolves decoding failures caused by voltage deviations

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs feedback mechanisms where decoding results are used to determine whether to adjust the readout voltage. The memory controller monitors decoding success/failure and uses this feedback to decide whether to maintain the current voltage or adjust it, creating a closed-loop control system that improves decoding reliability

Inventive Principle:
Principle #23Feedback

2Reliability

If multiple readout voltages are tried to correct decoding failures, then decoding accuracy improves, but processing time increases

Engineering Contradiction:
Improvedata reading accuracyVSAvoiddecoding processing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by attempting decoding with a limited number of voltage adjustments rather than exhaustively trying all possible voltages. The memory controller iteratively adjusts the voltage a predetermined number of times, performing just enough additional decoding attempts to correct typical voltage deviations without excessive processing overhead

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20250383958A1Memory system, memory controller, and method of controlling nonvolatile memory
Publication Date: 2025.12.18 KIOXIA CORP
  • US20250383958A1 patent drawing
  • US20250383958A1 patent drawing
  • US20250383958A1 patent drawing

AI summary

According to one embodiment, a memory system includes a nonvolatile memory storing an error correction code, and a memory controller. The memory controller reads out readout information from the nonvolatile memory by using a first readout voltage, executes decoding processing by using first input information that is one of the readout information and likelihood information obtained by converting the readout information by first conversion information, when the decoding processing has failed, further executes the decoding processing by using second input information obtained by correcting the first input information to be a value obtainable when being read out by a second readout voltage different from the first readout voltage, and estimates a third readout voltage based on reliability degree information indicating a reliability degree of the decoding processing.