Semiconductor Memory Voltage Range Detector Control Signal Adjustment

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Solution Overview

Problem

Conventional semiconductor memory devices fail to operate normally across a wide range of external power voltage levels, leading to insufficient performance characteristics and abnormal operations, as they are sensitive to voltage variations and require precise control signals to maintain specified access times.

Innovation Solution

A semiconductor memory device with a voltage range detector and a control signal generator that adjusts the control signal based on the detected voltage level, using comparators, voltage dividers, and logic gates to ensure the device operates within specifications across varying power voltage ranges.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the external power voltage varies, then the semiconductor memory device can operate at different voltage levels, but the access time characteristic cannot be satisfied with sufficient margin

Engineering Contradiction:

Improveexternal power voltage rangeVSAvoidaccess time characteristic

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements dynamic adjustment of control signals based on detected external power voltage levels. The control signal generating portion modifies timing control signals in real-time according to the detected voltage, enabling the device to adapt its internal timing characteristics dynamically. This resolves the contradiction by making the system flexible (improving adaptability) while maintaining specification compliance (preserving reliability).

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the timing parameters of control signals based on the detected power voltage level. When the external power voltage is detected to be at a low level, the timing control signal is adjusted to extend delay times, ensuring that access time characteristics are satisfied. This parameter adjustment mechanism allows the device to operate reliably across different voltage levels by adapting timing parameters to match the actual operating conditions.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If a control signal is set to adjust delay time for low voltage operation, then normal operation at low voltage is achieved, but normal operation at high voltage is lost

Engineering Contradiction:

Improvenormal operation at low voltageVSAvoidoperation at high voltage

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent employs dynamic control signal adjustment where the timing control signal is modified based on the detected external power voltage level. When low voltage is detected, delay time is extended to ensure normal operation. When high voltage is detected, the control signal returns to standard timing, enabling normal operation at high voltage. This dynamic adaptation resolves the contradiction by making the system flexible rather than fixed.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent implements a feedback mechanism where the external power voltage is continuously detected and used to adjust the control signal accordingly. The detection result feeds back to the control signal generating portion, which modifies the timing control signal to maintain normal operation. This feedback loop ensures that the device adapts to actual operating conditions, resolving the contradiction between optimized low-voltage operation and high-voltage adaptability.

Inventive Principle:

Principle #23Feedback

3Device complexity

If the timing control signal is fixed, then the device structure is simple, but the device cannot satisfy access time characteristics across varying power voltage

Engineering Contradiction:

Improvecontrol signal structureVSAvoidaccess time characteristic satisfaction

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent performs preliminary detection of the external power voltage level before executing memory operations. The control signal generating portion detects the voltage level in advance and prepares the appropriate timing control signal accordingly. This preliminary action ensures that the correct timing parameters are in place before operations begin, enabling the device to satisfy access time characteristics across varying power voltages without excessive complexity.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS7791960B2Semiconductor memory device and control signal generating method thereof

Publication Date: 2010.09.07 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor memory device and a control signal generating method thereof. The semiconductor memory device may include a voltage range detector configured to generate a voltage detecting signal corresponding to a range of a level of an external power voltage. A control signal generating portion may be used to generate a control signal corresponding to the range of the level of the external power voltage responsive to the voltage detecting signal. As a result, the semiconductor memory device can perform an operation for satisfying an access time characteristic according to a specification responsive to the control signal.