Nonvolatile Memory Power Loss Protection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Nonvolatile memory devices face data corruption and errors due to premature power loss or sudden power-offs, leading to unreliable data storage and retrieval.

Innovation Solution

A memory system with multiple power domains and voltage detectors that generate a reset signal when power voltages drop below a predetermined level, allowing for timely CPU intervention and auxiliary power supply to maintain data integrity, including the use of super capacitors for power backup.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If nonvolatile memory devices operate without power monitoring, then device complexity is reduced, but data reliability deteriorates due to premature power loss corruption

Engineering Contradiction:
Improvedata reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The voltage detector monitors power voltage in advance and generates a reset signal before power loss occurs, allowing the memory device to complete ongoing operations and enter a safe state. This preliminary detection and warning mechanism prevents data corruption without requiring complex real-time intervention systems.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The voltage detector acts as an intermediary component between the power source and the memory device. It monitors power conditions and mediates by generating reset signals to the CPU when voltage thresholds are violated, protecting the memory system from power loss without requiring direct complex control logic in the memory device itself.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If voltage detectors and reset signal generation are added to monitor power lines, then data reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory system performs self-protection through automatic voltage monitoring and reset signal generation. When the voltage detector detects power voltage violations, it automatically generates reset signals without requiring external intervention or complex control logic, enabling the system to protect itself from power loss corruption.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent replaces complex mechanical or software-based power loss protection mechanisms with a simple electrical voltage detection and reset signal generation system. The voltage detector uses basic electrical threshold detection and the reset signal uses standard electrical signaling to achieve reliable power loss protection without complex mechanical switches or software intervention.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If multiple power domains are monitored with individual voltage detectors, then measurement precision of power voltage is improved, but device complexity increases

Engineering Contradiction:
Improvepower voltage detection accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The power monitoring system is segmented into multiple independent voltage detectors, each assigned to monitor a specific power domain or power line. This segmentation allows each detector to focus on a single voltage threshold, simplifying the detection logic while achieving comprehensive coverage of all power lines. The modular structure enables precise monitoring without requiring a single complex detection system.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8904161B2Memory system and reset method thereof to prevent nonvolatile memory corruption due to premature power loss
Publication Date: 2014.12.02 SAMSUNG ELECTRONICS CO LTD
  • US8904161B2 patent drawing
  • US8904161B2 patent drawing
  • US8904161B2 patent drawing

AI summary

Provided is a memory system that includes at least one nonvolatile memory device, a plurality of power lines and a plurality of power domains. The power lines receive a power source voltage. The power domains are respectively connected to the power lines. A reset signal is generated by using voltages which are detected from the power lines. The memory system and a reset method thereof detect the voltages of all power lines to generate a reset signal, and thus enhance reliability of data when a power is shut off.