Semiconductor Memory Voltage Domain Segmentation for Leakage Control

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Solution Overview

Problem

Current semiconductor memory devices face challenges in efficiently performing write operations due to limitations in voltage domains and leakage currents, which affect the reliability and performance of electronic devices.

Innovation Solution

The implementation of a semiconductor memory device with a write circuit, selection blocks, and coupling control circuits that operate in different voltage domains, allowing for the generation of specific coupling signals to manage write currents and minimize leakage, thereby improving write operation efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor memory devices operate in a single voltage domain, then the device structure is simple, but write operation efficiency is poor due to leakage currents

Engineering Contradiction:
Improvewrite operation efficiencyVSAvoidvoltage domain structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the voltage domain into multiple separate domains (first voltage domain with first voltage level, second voltage domain with second voltage level) to manage write operations. By segmenting the voltage supply into distinct domains, the device can control leakage currents more effectively while maintaining operational efficiency, resolving the contradiction between write performance and structural simplicity.

Inventive Principle:
Principle #1Segmentation

2Speed

If write current is increased to improve write speed, then write operation performance is improved, but leakage current increases affecting reliability

Engineering Contradiction:
Improvewrite operation speedVSAvoiddevice reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies different voltage levels to different parts of the memory device during write operations. The first voltage domain provides a first voltage level for high-speed write operations, while the second voltage domain provides a second voltage level to suppress leakage currents. This local differentiation of voltage quality allows fast writes without compromising reliability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces a voltage domain management mechanism that acts as an intermediary between the write current source and the memory cells. This intermediary controls and regulates the voltage levels applied to different regions, enabling high-speed writes while preventing excessive leakage currents that would harm reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If voltage level is increased to overcome leakage current, then write operation reliability is improved, but energy consumption increases

Engineering Contradiction:
Improvewrite operation reliabilityVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent employs dynamic voltage domain management where the voltage level is adjusted based on operational requirements. During write operations, the first voltage domain uses a higher voltage level to ensure reliable data writing, while during idle or read operations, the second voltage domain uses a lower voltage level to reduce energy consumption. This dynamic adaptation resolves the contradiction between reliability and energy efficiency.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10437749B2Electronic device and method of driving the same
Publication Date: 2019.10.08 SK HYNIX INC
  • US10437749B2 patent drawing
  • US10437749B2 patent drawing
  • US10437749B2 patent drawing

AI summary

An electronic device may include a semiconductor memory. The semiconductor memory may include a write circuit, a first selection circuit, a memory cell, a coupling control circuit, and a coupling circuit. The write circuit may generate a write current corresponding to write data based on a control code signal. The first selection circuit may couple the write circuit to a first line based on a first selection signal, and may allow cell current corresponding to the write current to flow to the first line. The memory cell may be coupled between the first line and a second line, and may store the write data based on the cell current. The coupling control circuit may generate a coupling code signal corresponding to the write current based on the control code signal. The coupling circuit may selectively couple one or more voltage terminals among a plurality of voltage terminals to the second line based on a coupling code signal.