Memory Internal Voltage Generator Power Control

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Solution Overview

Problem

Conventional memory devices experience unnecessary power consumption during the active mode due to continuous operation of core voltage, internal voltage, and high voltage generating units, even when not required for certain sections of the active mode.

Innovation Solution

Implementing a memory device with a control mechanism that interrupts or disables the core voltage, internal voltage, and high voltage generating units after a prescribed time in active mode, enabling them only when a read/write command is applied, and ensuring they operate during specific operational sections to reduce power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If voltage generating units operate continuously during active mode, then voltage supply stability is maintained, but power consumption increases

Engineering Contradiction:
Improvevoltage supply stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by transitioning voltage generating units from static continuous operation to dynamic selective operation. The control mechanism dynamically enables or disables voltage generating units based on real-time operational mode detection, allowing the system to adapt its power consumption characteristics to actual operational needs while maintaining voltage stability when required.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements periodic action by enabling voltage generating units only during specific operational periods (active mode with read/write commands) rather than continuously. The control mechanism periodically activates voltage generating units based on detected command types, creating a rhythmic on-off pattern that reduces overall power consumption while ensuring voltage supply stability during critical operational windows.

Inventive Principle:
Principle #19Periodic action

2Loss of energy

If voltage generating units are disabled to reduce power consumption, then energy efficiency improves, but voltage supply reliability may deteriorate

Engineering Contradiction:
Improveenergy efficiencyVSAvoidvoltage supply reliability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies feedback by implementing a control mechanism that continuously monitors operational mode signals and uses this feedback to make real-time decisions about voltage generating unit activation. The control mechanism receives feedback from command detection circuits, processes this information, and adjusts the operational state of voltage generating units accordingly, ensuring voltage supply reliability is maintained during critical operations while enabling energy savings during non-critical periods.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent implements self-service by enabling the control mechanism to autonomously manage voltage generating unit activation without external intervention. The system automatically detects operational modes, determines appropriate voltage generation requirements, and controls voltage generating unit operation independently, thereby optimizing the balance between energy efficiency and voltage supply reliability through self-regulated operation.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7382677B2Memory device having internal voltage supply providing improved power efficiency during active mode of memory operation
Publication Date: 2008.06.03 SK HYNIX INC
  • US7382677B2 patent drawing
  • US7382677B2 patent drawing
  • US7382677B2 patent drawing

AI summary

A internal voltage generator in a semiconductor memory device has a first and second internal voltage generators. The first internal voltage generator outputs a first signal having a first voltage level to internal circuits of the memory device during an active mode of the memory device operation. The second internal voltage generator outputs a second signal having a second voltage level to the internal circuits of the memory device; however, the second signal is interrupted in absence of a predetermined level of a power control signal during the active mode of the memory device operation. The internal voltage control unit monitors the operational signals generated by the memory device and outputs the predetermined level of the power control signal during a plurality of active sections of the active mode of the memory device operation requiring power.