Semiconductor Memory Internal Voltage Generator
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in operating at high speeds due to low internal array power supply voltages, which limit bit line sensing speed and data amplification efficiency, especially with reduced transistor sizes and increased integration density.
Innovation Solution
An internal voltage generator in semiconductor memory devices activates an overdriving signal in response to a precharge command, extending the overdriving period and using a combination of active and standby array power supply voltages to stabilize operations, ensuring sufficient voltage levels and reducing noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the internal array power supply voltage is reduced to lower power consumption, then power consumption decreases, but bit line sensing speed and data amplification efficiency deteriorate
Solution Approach 1:
The patent applies dynamic voltage switching by enabling the sense amplifier to operate at a first voltage level during sensing operations and automatically switching to a second voltage level during precharge operations. This dynamic voltage adjustment allows the system to optimize performance during sensing while reducing power consumption during precharge, resolving the contradiction between speed and energy loss
Solution Approach 2:
The patent changes the voltage parameter of the sense amplifier based on operational state. By detecting whether the operation is sensing or precharge and adjusting the voltage accordingly, the system achieves high sensing speed when needed while minimizing power consumption during precharge periods
2Productivity
If the size of PMOS transistors in sense amplifiers is reduced to increase integration density, then device integration increases, but data amplification capability deteriorates
Solution Approach 1:
The patent compensates for the reduced amplification capability of smaller PMOS transistors by dynamically adjusting the supply voltage to the sense amplifier. During sensing operations, the amplifier receives a higher voltage level that enhances the driving capability of the reduced-size transistors, thereby maintaining sufficient amplification performance while achieving higher integration density
Solution Approach 2:
The system dynamically adjusts the voltage supply to match the operational requirements of the scaled-down transistors. This dynamic compensation allows the sense amplifier to maintain adequate amplification capability despite using smaller, more densely integrated PMOS transistors
3Loss of energy
If a conventional internal array power supply voltage is used during precharge, then power consumption is low, but noise reduction and operational stability during precharge deteriorate
Solution Approach 1:
The patent implements dynamic voltage switching that detects precharge operations and automatically raises the sense amplifier supply voltage to a second level during these operations. This dynamic adjustment maintains low power consumption during normal operation while providing enhanced stability and noise reduction during precharge periods when needed
Solution Approach 2:
The system performs preliminary voltage adjustment during precharge operations to prepare the sense amplifier for the next sensing operation. By proactively adjusting the voltage level during precharge, the system ensures optimal starting conditions for subsequent sensing while maintaining overall power efficiency
Data Source
AI summary
A semiconductor memory device and a method of generating an internal voltage in the semiconductor memory device are provided. The semiconductor memory device includes a controller configured to activate a sensing enable signal when an active command is applied from outside, inactivate the sensing enable signal when a precharge command is applied, and output the sensing enable signal, and an array internal voltage generator configured to output an active array power supply voltage as an array power supply voltage when the sensing enable signal is activated, output an external array power supply voltage and a standby array power supply voltage as the array power supply voltage when the sensing enable signal is inactivated, and output the standby array power supply voltage alone as the array power supply voltage when the sensing enable signal is inactivated for at least a specific period.