Memory Read Voltage Group Selection for Faster Hard Bit Decoding

Solution Overview

Problem

In rewritable non-volatile memory modules, the existing methods for hard bit mode decoding are inefficient due to the need to repeatedly obtain and test read voltages, consuming significant time before switching to soft bit mode decoding, as the number of voltage re-obtaining attempts is typically high and time-consuming.

Innovation Solution

A voltage identifying method that reads memory cells using a first read voltage group, generates verification information, identifies corresponding second read voltage groups based on the verification information's interval, and performs decoding using a third read voltage group to quickly determine failed voltage groups, thereby reducing the time required for hard bit mode decoding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory management circuit repeatedly obtains and tests multiple read voltages to ensure decoding success, then the reliability of data reading is improved, but the time consumption for hard bit mode decoding operation increases significantly

Engineering Contradiction:

Improvedecoding success rateVSAvoidtime for voltage re-obtaining attempts

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent pre-divides the complete read voltage group into multiple sub-groups and pre-determines their decoding failure characteristics. During actual operation, the memory management circuit can directly select an appropriate sub-group based on verification information without sequentially testing all voltages, thus performing the selection action in advance to avoid time-consuming repeated attempts.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent segments the complete read voltage group into multiple sub-groups (first read voltage group, second read voltage group, etc.), each with distinct decoding failure characteristics. This segmentation allows the system to narrow down the search space from all possible voltages to a specific subset, reducing the number of attempts needed while maintaining reliable decoding.

Inventive Principle:

Principle #1Segmentation

2Reliability

If the preset number of voltage re-obtaining attempts is increased to ensure decoding success, then the reliability is improved, but the productivity of data retrieval decreases due to extended operation time

Engineering Contradiction:

Improvedecoding success rateVSAvoiddata retrieval efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent pre-divides the complete read voltage group into multiple sub-groups and pre-determines their decoding failure characteristics. During actual operation, the memory management circuit can directly select an appropriate sub-group based on verification information without sequentially testing all voltages, thus performing the selection action in advance to avoid time-consuming repeated attempts.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent segments the complete read voltage group into multiple sub-groups (first read voltage group, second read voltage group, etc.), each with distinct decoding failure characteristics. This segmentation allows the system to narrow down the search space from all possible voltages to a specific subset, reducing the number of attempts needed while maintaining reliable decoding.

Inventive Principle:

Principle #1Segmentation

3Reliability

If the memory management circuit performs sequential reading and decoding with multiple read voltages, then the reliability of data retrieval is improved, but the time required for hard bit mode decoding operation increases

Engineering Contradiction:

Improvedata retrieval reliabilityVSAvoidtime for hard bit mode decoding

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent pre-divides the complete read voltage group into multiple sub-groups and pre-determines their decoding failure characteristics. During actual operation, the memory management circuit can directly select an appropriate sub-group based on verification information without sequentially testing all voltages, thus performing the selection action in advance to avoid time-consuming repeated attempts.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent segments the complete read voltage group into multiple sub-groups (first read voltage group, second read voltage group, etc.), each with distinct decoding failure characteristics. This segmentation allows the system to narrow down the search space from all possible voltages to a specific subset, reducing the number of attempts needed while maintaining reliable decoding.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS10978163B2Voltage identifying method, memory controlling circuit unit and memory storage device

Publication Date: 2021.04.13 PHISON ELECTRONICS

AI summary

A voltage identifying method, a memory controlling circuit unit, and a memory storage device are provided. The method includes: reading a plurality of first memory cells according to a first read voltage group in a plurality of read voltage groups and performing a first decoding operation to generate first verification information; identifying a plurality of second read voltage groups in the plurality of read voltage groups corresponding to a first interval in a plurality of intervals according to the first interval in which the first verification information is located; and reading the plurality of first memory cells by using a third read voltage group in the plurality of second read voltage groups and performing the first decoding operation.