Semiconductor Memory Device Voltage Matching Subthreshold Leak

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Solution Overview

Problem

Subthreshold leak currents in unselected memory cells cannot be entirely eliminated when the voltage applied to a source line is excessively lower or higher than the voltage applied to a bit line, leading to voltage fluctuations and potential data write errors in semiconductor memory devices.

Innovation Solution

A semiconductor memory device incorporates a dummy bit line coupled to a source line and applies a predetermined voltage to a dummy word line, ensuring that the voltage of the unselected source line matches the voltage of the selected bit line, thereby eliminating subthreshold leak currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the voltage applied to a source line is excessively lower or higher than the voltage applied to a bit line, then the subthreshold leak current in unselected memory cells increases, but this causes voltage fluctuations and potential data write errors

Engineering Contradiction:
Improvedata write accuracyVSAvoidsubthreshold leak current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies equipotentiality by setting the voltage of the unselected source line to match the voltage of the selected bit line through a dummy bit line. This voltage matching eliminates the potential difference that causes subthreshold leak current, thereby preventing voltage fluctuations and ensuring accurate data writing in selected memory cells.

Inventive Principle:
Principle #12Equipotentiality

2Reliability

If a dummy bit line is coupled to a source line and a predetermined voltage is applied to a dummy word line, then the voltage of the unselected source line matches the voltage of the selected bit line, but this requires additional circuit components

Engineering Contradiction:
Improvevoltage stabilityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a dummy bit line as an intermediary element that couples the unselected source line to the voltage reference. This dummy bit line, along with the dummy word line, acts as a mediator to transfer the predetermined voltage to the unselected source line, ensuring voltage matching without directly modifying the main memory cell structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Object-generated harmful factors

If the voltage applied to a source line is excessively lower or higher than the voltage applied to a bit line, then the subthreshold leak current flows between source and bit lines, but eliminating this requires precise voltage control

Engineering Contradiction:
Improvesubthreshold leak currentVSAvoidvoltage control precision
Core Design Contradiction:
Object-generated harmful factorsVSEase of operation

Solution Approach 1:

The patent uses a dummy bit line that copies the voltage characteristics of the selected bit line. By applying the predetermined voltage to the dummy word line, the dummy bit line generates a copied voltage signal that is applied to the unselected source line, ensuring precise voltage matching without requiring complex voltage control circuits.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10204690B2Semiconductor memory device
Publication Date: 2019.02.12 RENESAS ELECTRONICS CORP
  • US10204690B2 patent drawing
  • US10204690B2 patent drawing
  • US10204690B2 patent drawing

AI summary

A semiconductor memory device according to the present invention includes a first memory cell, a second memory cell, a dummy transistor, and a voltage control circuit. The first memory cell has a first transistor that is coupled to a first word line, a first source line, and a bit line. The second memory cell has a second transistor that is coupled to a second word line, a second source line, and the bit line. The dummy transistor has the same structure as the first transistor and is coupled to a dummy word line, a dummy source line, and a dummy bit line. When a predetermined voltage for writing data into the first memory cell is to be applied to the first word line, the voltage control circuit couples the dummy bit line to the second source line and applies the predetermined voltage to the first dummy word line.