Memory Device Voltage Parameter Segmentation for Mode-Specific Read and Program Operations
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory devices struggle to efficiently operate in both multi-bit per memory cell and single-bit per memory cell modes due to differences in voltage requirements, leading to inconsistencies in read and programming operations, which can result in reduced performance and reliability.
Innovation Solution
The method involves applying distinct voltage parameters such as VREADK, VREAD, VSGD, and inhibit voltages based on the operating mode, with specific voltage profiles for multi-bit per memory cell and single-bit per memory cell modes to ensure accurate data storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a memory block is configured to operate in both multi-bit per memory cell mode and single-bit per memory cell mode with different voltage parameters, then operating performance and reliability are improved, but device complexity increases due to the need to manage multiple voltage profiles
Solution Approach 1:
The patent implements dynamic voltage parameter selection where the memory device automatically adjusts voltage profiles based on the detected operating mode. The control circuitry dynamically switches between first voltage parameters for multi-bit mode and second voltage parameters for single-bit mode, allowing the system to adapt its electrical characteristics to the current operational requirements without manual reconfiguration.
Solution Approach 2:
The patent changes electrical parameters (voltage levels VREADK, VREAD, VSGD, and inhibit voltages) based on the operating mode. By detecting whether the memory block is in multi-bit or single-bit mode, the system modifies the voltage applied to word lines and bit lines accordingly, optimizing read and programming operations for each specific mode while maintaining reliable operation.
2Measurement precision
If distinct voltage parameters are applied for different operating modes, then read and programming accuracy are improved, but the number of voltage profiles and control logic increases
Solution Approach 1:
The patent segments the voltage parameter set into distinct groups corresponding to different operating modes. First voltage parameters (VREADK1, VREAD1, VSGD1, inhibit1) are designated for multi-bit mode while second voltage parameters (VREADK2, VREAD2, VSGD2, inhibit2) are designated for single-bit mode. This segmentation allows precise control for each mode while organizing the complexity into manageable, mode-specific parameter sets.
Solution Approach 2:
The patent performs preliminary detection of the operating mode before executing read or programming operations. The control circuitry determines whether the memory block is configured for multi-bit or single-bit mode in advance, allowing it to pre-select the appropriate voltage parameters. This preliminary action ensures that the correct voltage profile is applied from the start, improving operational accuracy while avoiding the need for complex real-time adjustments during execution.
3Reliability
If mode-specific voltage parameters are used, then data integrity is improved, but manufacturing and programming complexity increases
Solution Approach 1:
The patent implements self-service operation where the memory device automatically detects its own operating mode and selects the appropriate voltage parameters without external intervention. The control circuitry monitors the memory block configuration and autonomously adjusts voltage profiles during read and programming operations, eliminating the need for complex external programming sequences or manual configuration, thereby simplifying manufacturing and usage while maintaining data integrity.
Data Source
AI summary
The memory device includes a plurality of memory blocks that can individually operate in either a multi-bit per memory cell mode or a single-bit per memory cell mode. Certain voltage parameters during programming and reading are shared between these two operating modes, and certain voltage parameters are unique to each operating mode. One unique voltage parameter is a pass voltage VREADK that is applied to word lines adjacent a selected word line being read. Another unique voltage parameter is a VSGD voltage that is applied to a select gate drain transistor during programming. Yet another unique voltage parameter is an inhibit voltage that is applied to a bit line coupled with a memory cell being inhibited from programming while other memory cells are programmed.