Memory Word Line Voltage Modulation for Power and MOSFET Reliability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing memory devices face high power consumption and reliability issues due to constant high voltage levels on word lines, particularly affecting metal-oxide-semiconductor field-effect transistors (MOSFETs) with time-dependent dielectric breakdown properties.

Innovation Solution

A temperature coefficient modulation (TCM) circuit is introduced to generate output voltages that switch between positive and negative temperature coefficients based on operation modes, optimizing power management by adjusting the word line voltage accordingly during read and write operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If constant high voltage levels are applied to word lines, then memory access reliability is maintained, but power consumption increases and MOSFET reliability deteriorates

Engineering Contradiction:
Improvememory access reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic voltage adjustment on word lines based on operation mode (read/write) and temperature conditions. The TCM circuit dynamically switches between positive and negative temperature coefficient modes, and the voltage regulator adjusts word line voltage levels from high voltage (for write operations) to lower voltage (for read operations), eliminating the need for constant high voltage while maintaining memory access reliability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the voltage parameter of word lines dynamically based on operational requirements. During write operations, high voltage is applied to ensure sufficient write margin; during read operations, lower voltage suffices. Additionally, the temperature coefficient parameter is changed by switching between PTC and NTC modes to compensate for temperature-induced resistance variations, thereby maintaining reliable operation across different temperatures without constant high voltage

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If temperature coefficient modulation is implemented, then power consumption is reduced and MOSFET reliability is improved, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent introduces a TCM (temperature coefficient modulation) circuit as an intermediary component that generates reference voltages with switchable temperature coefficients. This intermediary circuit enables the main memory array to operate with optimized voltage levels without requiring complex modifications to the core memory cells, thereby achieving power reduction and MOSFET reliability improvement with minimal impact on overall device complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The TCM circuit serves multiple functions: it generates reference voltages for both read and write operations, switches between positive and negative temperature coefficient modes to compensate for temperature variations, and provides voltage regulation to the word lines. By consolidating these multiple functions into a single circuit block, the patent achieves power consumption reduction and reliability improvement without proportionally increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12167613B2Circuit and method to enhance efficiency of memory
Publication Date: 2024.12.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12167613B2 patent drawing
  • US12167613B2 patent drawing
  • US12167613B2 patent drawing

AI summary

A method includes: providing a modulation circuit including a first resistive element, a second resistive element and a third resistive element; providing a memory array and a regulator connecting the modulation circuit to the memory array, wherein the regulator includes a transistor; determining an operation mode of the memory array; generating a first voltage at a drain terminal of the transistor, wherein the first voltage corresponds to a positive, negative zero temperature coefficient according to a first resistance ratio and a second resistance ratio; during a read operation, providing a first driving current to the memory array in response to the first voltage corresponding to the positive temperature coefficient; and during a write operation, providing a second driving current to the memory array in response to the first voltage corresponding to the negative temperature coefficient.