Memory Voltage Supply Node Floating for Leakage Reduction
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Solution Overview
Problem
The challenge is to maintain bitcell read margins while minimizing leakage current in memory systems, as boosting voltage for read operations leads to increased power consumption when switching between voltage levels during successive reads.
Innovation Solution
The memory system allows the voltage supply node to float after a read operation, allowing leakage current to pull it down to a predetermined level, and then couples a power supply terminal at that level to prevent further drifting, thereby reducing the need for frequent voltage switching and conserving power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the voltage to the bitcell is boosted to a higher supply voltage level to increase bitcell read margins, then read performance is improved, but leakage current is increased when the memory is not being accessed
Solution Approach 1:
The patent applies dynamics by making the voltage supply to the bitcell changeable over time. The bitcell voltage supply node is dynamically switched between a higher voltage level (Vdd_hi) during read operations to improve read margins, and a lower voltage level (Vdd_low) during non-access periods to reduce leakage current. This dynamic voltage adjustment resolves the contradiction between maintaining read performance and minimizing energy loss.
Solution Approach 2:
The patent changes the voltage parameter of the bitcell supply node based on operational state. By transitioning the voltage level from Vdd_hi to Vdd_low depending on whether a read operation is active, the system optimizes both read margin (when voltage is high) and leakage current (when voltage is low), effectively resolving the technical contradiction.
2Loss of energy
If the boosted voltage is actively switched back to a lower voltage after the read, then leakage current is reduced, but more power is consumed due to frequent voltage switching during successive reads
Solution Approach 1:
The patent applies self-service by allowing the bitcell voltage supply node to float and naturally drift downward to the lower voltage level (Vdd_low) through leakage current after a read operation completes. Instead of actively switching the voltage down (which consumes power), the system lets the node self-regulate to the lower state, eliminating the power cost of active downward switching while still achieving leakage reduction.
Solution Approach 2:
The patent converts the harmful effect of leakage current into a beneficial mechanism. By allowing leakage current to naturally drift the voltage down to Vdd_low after reads, the system uses what would normally be a source of energy loss to achieve voltage regulation without requiring additional power for active switching, thus resolving the contradiction between reducing leakage and minimizing switching power.
Data Source
AI summary
A memory has a method of operating that includes performing operations of a first type and a second type. A first voltage is coupled to a power supply node of a first memory cell of a memory array during a first operation of the first type. The first voltage is decoupled from the power supply node in response to terminating the first operation of the first type so as to allow the power supply node to drift. If the power supply node drifts to a second voltage, a power supply source is coupled to the power supply node. This is useful in reducing power in the circuit that produces the first voltage.