Memory Cell Read Voltage Centering From Signal and Noise Profiles

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional memory systems face inefficiencies in calibrating read voltages for memory cells due to shifts in threshold voltages caused by factors like charge loss and temperature changes, leading to high bit error rates and prolonged data retrieval latency through blind searching and multiple retry operations.

Innovation Solution

A memory sub-system that measures signal and noise characteristics to compute an optimized read voltage, allowing for efficient calibration and estimation of bit error rates, thereby improving data retrieval efficiency by scheduling hard and soft bit data reading together and selectively transmitting soft bit data based on error predictions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional blind searching and multiple retry operations are used to calibrate read voltages, then read voltage calibration can be performed, but data retrieval latency increases and productivity decreases

Engineering Contradiction:
Improveread voltage calibration accuracyVSAvoiddata retrieval latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system performs preliminary measurement of signal and noise characteristics before actual data retrieval operations. By pre-calculating the optimized read voltage based on these characteristics, the system avoids time-consuming blind searching during data retrieval, thus reducing latency while maintaining calibration accuracy

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system measures signal and noise characteristics from memory cell readings and uses this feedback to dynamically adjust and optimize the read voltage. This closed-loop feedback mechanism enables accurate voltage calibration without requiring multiple retry operations, thereby reducing data retrieval latency

Inventive Principle:
Principle #23Feedback

2Reliability

If multiple retry operations are performed to compensate for threshold voltage shifts, then bit error rate decreases, but data retrieval latency increases

Engineering Contradiction:
Improvebit error rateVSAvoiddata retrieval latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system changes the read voltage parameter based on measured signal and noise characteristics to adapt to threshold voltage shifts. By dynamically adjusting the voltage parameter rather than relying on multiple retries, the system maintains low bit error rates while reducing data retrieval latency

Inventive Principle:
Principle #35Parameter changes

3Reliability

If soft bit data reading is always performed alongside hard bit data, then error recovery capability improves, but device complexity and energy consumption increase

Engineering Contradiction:
Improveerror recovery capabilityVSAvoidreading operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system performs soft bit data reading selectively rather than always. By using the measured noise characteristics to determine when soft bit reading is necessary, the system achieves adequate error recovery capability while avoiding unnecessary complexity and energy consumption from always performing both hard and soft bit reads

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11177013B1Determine signal and noise characteristics centered at an optimized read voltage
Publication Date: 2021.11.16 MICRON TECHNOLOGY INC
  • US11177013B1 patent drawing
  • US11177013B1 patent drawing
  • US11177013B1 patent drawing

AI summary

A memory device to estimate signal and noise characteristics of a group of memory cells in response to a command identifying the group of memory cells. For example, the memory device measures first signal and noise characteristics of the group of memory cells based on first test voltages, compute using the first signal and noise characteristics an optimized read voltage of the group of memory cells, and estimate, using the first signal and noise characteristics, second signal and noise characteristics of the group of memory cells, where the second signal and noise characteristics are based on second test voltages that are centered at the optimized read voltage of the group of memory cells.